IP Library Granted Patent US 7,522,900
Granted Patent B2
US 7,522,900 · App. 09/813,420 · Granted Apr 21, 2009

DC offset correction for use in a radio architecture

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Quick Facts
Patent No.
US 7,522,900
App. No.
09/813,420
Granted
Apr 21, 2009
Kind
B2
Abstract

A method and apparatus for determining a delay vector from inputs of in-phase and quadrature phase low pass filters to an output of the demodulator of a dual mixer radio receiver and from such delay measurement computing and providing DC offset correction to said receiver.

Claims (53)

1. A radio receiver, comprising:

an amplifier configured to receive and amplify an intermediate frequency modulated signal having in-phase and quadrature phase DC components;

an analog-to-digital converter configured to receive the amplified intermediate frequency modulated signal and convert it to a digital signal;

a demodulator operable to demodulate the digital signal;

DC offset calibration means coupled to the demodulator operable to provide in-phase and quadrature phase DC offset correction signals to compensate for the in-phase and quadrature phase DC components at the input of the amplifier; and

delay measurement means coupled to the demodulator operable to determine a delay vector characterizing the in-phase and quadrature phase DC components.

2. The radio receiver of claim 1 , wherein the delay vector is used by the DC offset calibration means to provide a digital representation of the in-phase and quadrature phase DC offset correction signals.

3. The radio receiver of claim 2 , further comprising:

a first digital-to-analog converter configured to receive a in-phase component of the digital representation of the in-phase DC offset correction signal for mixing with an in-phase signal and an intermediate frequency carrier signal;

a second digital-to-analog converter configured to receive a quadrature phase component of the digital representation of the quadrature phase DC offset correction signal for mixing with a quadrature signal and the intermediate frequency carrier signal; and

a summer operable to subtract the mixed quadrature phase signal and quadrature phase DC offset correction signal component from the mixed in-phase signal and in-phase DC offset correction signal to provide a DC compensated intermediate frequency modulated signal at the input of the low noise amplifier.

4. A radio receiver, comprising:

a receiving stage configured to receive a radio signal;

a first mixer stage operable to downconvert the radio frequency signal to a first intermediate frequency in-phase signal and a first intermediate quadrature phase signal;

first and second low pass filters configured to receive and low pass filter the first intermediate frequency in-phase and quadrature phase signals;

a second mixer stage operable to upconvert the filtered first intermediate frequency in-phase and quadrature phase signals and provide a second intermediate frequency in-phase signal and a second intermediate frequency quadrature phase signal;

a summer operable to subtract the second intermediate frequency quadrature phase signal from the second intermediate frequency in-phase signal to provide an integrated signal;

an automatic gain control stage coupled to the summer and operable to amplify the integrated signal;

an analog-to-digital converter operable to convert the amplified integrated signal to a digital signal;

a demodulator operable to demodulate the digital signal; and

delay measurement means for determining a delay vector from inputs of the low pass filters to an output of the demodulator.

5. The radio receiver of claim 4 , further comprising:

a DC offset calibrator coupled to the delay measurement means;

an in-phase digital-to-analog converter coupled between the DC offset calibrator and the second mixer stage; and

a quadrature phase digital-to-analog converter coupled between the DC offset calibrator and the second mixer stage,

wherein the in-phase digital-to-analog converter is operable to provide an in-phase DC offset compensation signal for the automatic gain control stage and the quadrature phase digital-to-analog converter is operable to provide a quadrature phase DC offset compensation signal for the automatic gain control stage.

6. A method of determining a signal delay between inputs of first and second low pass filters of a dual mixer stage radio receiver and an output of the receiver's demodulator, the method comprising the steps of:

applying a first known voltage to an input of an in-phase mixer of the second mixer stage;

applying a second known voltage to an input of a quadrature phase mixer of the second mixer stage;

setting the gain of an automatic gain control stage, coupled to the second mixer stage, to a full gain; measuring first in-phase and first quadrature phase components at the output of the demodulator;

decreasing the gain of the automatic gain control stage by a predetermined amount if the value of either first component is greater than a predetermined maximum threshold value;

storing the first in-phase and quadrature phase components if the value of each component is less than the predetermined maximum threshold value;

applying the negative of the first known voltage to the input of the in-phase mixer;

applying the second known voltage to the input of the quadrature phase mixer;

measuring second in-phase and second quadrature phase components at the output of the demodulator;

decreasing the gain of the automatic gain control stage by a predetermined amount if the value of either second component is greater than the predetermined maximum threshold value;

storing the second in-phase and quadrature phase components if the value of each second component is less than the predetermined maximum threshold value; and

using the first and second quadrature phase components to compute the signal delay.

7. A method of compensating for DC offset voltages present at an input of a low noise amplifier of a dual mixer stage radio receiver, the method comprising the steps of:

determining a signal delay between an output of a second mixer stage of the dual mixer stage radio receiver, said signal delay characterizing in-phase and quadrature phase components of the DC offset voltage present at the input of the low noise amplifier;

using the determined signal delay to separate and define digital representations of the in-phase DC offset voltage component and the quadrature phase DC offset voltage component;

making the digital representation of each of the in-phase and quadrature phase components more positive or more negative if it is more negative or more positive than a predetermined minimum threshold or maximum threshold; and

performing the above sequence of steps a predetermined number of times to reduce the DC offset voltage at the input of the low noise amplifier.

8. A method of setting signal levels of in-phase and quadrature phase components of a radio receiver between a minimum threshold voltage and a maximum threshold voltage, the method comprising the steps of:

(a) setting the gain of an automatic gain control to a gain value at which the signal levels of the in-phase and quadrature phase components are less than or equal to the maximum threshold voltage;

(b) comparing the signal levels of the in-phase and quadrature phase components to the minimum threshold voltage;

(c) increasing the gain of the automatic gain control stage by a predetermined amount; and

(d) repeating steps (b) and (c) until the signal levels of the in-phase and quadrature phase components are greater than or equal to the minimum threshold voltage.

9. A method of compensating for DC offset voltages at inputs of in-phase and quadrature phase low pass filters of a dual mixer stage radio receiver, said method comprising the steps of:

determining a signal delay vector between the inputs of the low pass filters, said signal delay vector characterizing in-phase and quadrature phase components of DC offset voltages at the inputs of the low pass filters;

using the signal delay vector to separate and define in-phase and quadrature phase multiplication factors associated with the in-phase and quadrature phase DC offsets;

incrementally adjusting the signal level of the in-phase component to a more positive or more negative value if the in-phase multiplication factor has a negative or positive value, respectively; and

incrementally adjusting the signal value of the quadrature phase component to a more positive or more negative value if the quadrature phase multiplication factor has a negative or positive value, respectively.

Assignments (11)
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED AT REEL: 047195 FRAME: 0827. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Nov 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047924/0571 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0827 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2005
From: ZEEVO, INC.
To: BROADCOM CORPORATION
Reel/Frame 016360/0112 →
TERMINATION AND RELEASE OF INTELLECTUAL PROPERTY SECURITY Recorded Mar 17, 2005
From: WK TECHNOLOGY FUND; WK TECHNOLOGY FUND IV; WK TECHNOLOGY FUND V; WK TECHNOLOGY FUND VI; WK TECHNOLOGY FUND VII; WK TECHNOLOGY FUND VIII; WK GLOBAL INVESTMENT LIMITED; WK GLOBAL INVESTMENT II LIMITED; WK GLOBAL INVESTMENT III LIMITED; SEQUOIA CAPITAL IX; SEQUOIA CAPITAL IX PRINCIPAL'S FUND; SEQUOIA CAPITAL FRANCHISE FUND; SEQUOIA CAPITAL FRANCHISE PARTNERS; FOCUS VENTURES II, L.P.; FOCUS VENTURES II, A, L.P.; FOCUS VENTURES II, QP, L.P.; SAIYED ATIG RAZA AND NOREEN TIRMIZI RAZA, TRUSTEES N&A RAZA REVOCABLE TRUST; SEQUOIA CAPITAL ENTREPRENEURS ANNEX FUND AS SUCCESSOR IN INTEREST TO SEQUOIA CAPITAL ENTREPRENEURS FUND
To: ZEEVO, INC.
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TERMINATION OF SECURITY AGREEMENT IN PATENTS Recorded Apr 1, 2004
From: GATX VENTURES, INC.; GENERAL ELECTRIC CAPITAL CORPORATION, SUCCESSOR IN INTEREST TO TRANSAMERICA COMMERCIAL FINANCE CORPORATION
To: ZEEVO, INC.
Reel/Frame 014482/0330 →
ASSIGNMENT OF SECURITY INTEREST IN PATENTS Recorded Oct 29, 2003
From: COMDISCO VENTURES, INC.
To: WK TECHNOLOGY FUND; WK TECHNOLOGY FUND IV; WK TECHNOLOGY FUND VI; WK TECHNOLOGY FUND VIII; WK GLOBAL INVESTMENT II LIMITED; SEQUOIA CAPITAL IX; WK TECHNOLOGY FUND V; WK TECHNOLOGY FUND VII; WK GLOBAL INVESTMENT LIMITED; WK GLOBAL INVESTMENT III LIMITED; SEQUOIA CAPITAL ENTREPRENEURS FUND; SEQUOIA CAPITAL FRANCHISE PARTNERS; SEQUOIA CAPITAL IX PRINCIPAL'S FUND; FOCUS VENTURES II, L.P.; FOCUS VENTURES II A, L.P.; SEQUOIA CAPITAL FRANCHISE FUND; SAIYED ATIG RAZA AND NOREEN TIRMIZI RAZA, TRUSTEES N&A RAZA REVOCABLE TRUST UAD 03/22/97; FOCUS VENTURES II QP, L.P.
Reel/Frame 014653/0611 →
SECURITY INTEREST Recorded Aug 11, 2003
From: ZEEVO, INC.
To: COMDISCO VENTURES, INC.
Reel/Frame 014462/0200 →
SECURITY AGREEMENT (SEE DOCUMENT FOR DETAILS). Recorded Aug 13, 2001
From: ZEEVO, INC.
To: GATX VENTURES, INC.; TRANSAMERICA COMMERCIAL FINANCE CORPORATION; TRANSAMERICA COMMERICAL FINANCE CORPORATION
Reel/Frame 012070/0007 →