IP Library Granted Patent US 7,348,494
Granted Patent B1
US 7,348,494 · App. 09/821,722 · Granted Mar 25, 2008

Signal layer interconnects

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,348,494
App. No.
09/821,722
Granted
Mar 25, 2008
Kind
B1
Abstract

Inner layer traces on a multilayer printed wiring board are exposed to enable direct interconnection with another device such as a printed wiring board. The traces may be exposed by removing at least some of the dielectric substrate material around the traces, or by extending the traces beyond the other layers of the printed wiring board. Corresponding conductors associated with the other device are placed in direct physical contact with the exposed inner layer traces, and may be aligned and secured with guide plates, alignment pins and spring members. Such direct connection mitigates the need for vias, and has more favorable electrical characteristics for high frequency signal transmission.

Claims (24)

1. An interconnection device comprising:

first and second outer layers, each including substrate material;

at least one inner layer disposed between said first and second outer layers, said inner layer including at least one conductive signal trace disposed on a rigid substrate material proximate to an edge of the interconnection device and being accessible for direct electrical connection with a corresponding exposed signal trace, wherein at least one conductive protrusion is formed on said conductive inner layer trace, and wherein said protrusion is resilient; and

shielding disposed around the at least one signal trace, including a first shielding wall on a layer below the trace, a second shielding wall on a layer above the trace, and third and fourth shielding walls on either side of the trace, the first, second, third and fourth shielding walls being connected such that uninterrupted shielding is provided for 360° around the trace.

2. The interconnection device of claim 1 wherein said conductive inner layer trace extends outward from the edge of the interconnection device.

3. The interconnection device of claim 1 wherein at least a portion of said first outer layer is removed to provide access to said conductive inner layer trace.

4. The interconnection device of claim 1 wherein said protrusion is malleable.

5. The interconnection device of claim 1 wherein said inner layer substrate material is organic.

6. An interconnection device comprising:

a printed circuit board having first and second outer layers, each including substrate material;

at least one inner layer disposed between said first and second outer layers, said inner layer including at least one conductive signal trace disposed on substrate material proximate to an edge of the interconnection device and being accessible for direct electrical connection with a corresponding signal trace, wherein at least one conductive protrusion is formed on said at least one conductive signal trace, and wherein said protrusion is resilient, and wherein said inner layer substrate material is a ceramic; and

shielding disposed around the at least one signal trace, including a first shielding wall on a layer below the trace, a second shielding wall on a layer above the trace, and third and fourth shielding walls on either side of the trace, the first, second, third and fourth shielding walls being connected such that uninterrupted shielding is provided for 360° around the trace.

7. The interconnection device of claim 6 wherein said conductive inner layer trace extends outward from the edge of the interconnection device.

8. The interconnection device of claim 6 wherein at least a portion of said first outer layer is removed to provide access to said conductive inner layer trace.

9. The interconnection device of claim 6 wherein at least one conductive protrusion is formed on said conductive inner layer trace.

10. The interconnection device of claim 9 wherein said protrusion is malleable.

11. An interconnection device comprising:

first and second outer layers, each including substrate material;

at least one inner layer disposed between said first and second outer layers, said inner layer including at least one conductive signal trace disposed on a rigid substrate material proximate to an edge of the interconnection device and being accessible for direct electrical connection with a corresponding exposed signal trace, wherein at least one conductive protrusion is formed on said conductive inner layer trace, and wherein said protrusion is malleable; and

shielding disposed around the at least one signal trace, including a first shielding wall on a layer below the trace, a second shielding wall on a layer above the trace, and third and fourth shielding walls on either side of the trace, the first, second, third and fourth shielding walls being connected such that uninterrupted shielding is provided for 360° around the trace.

12. An interconnection device comprising:

a printed circuit board having first and second outer layers, each including substrate material;

at least one inner layer disposed between said first and second outer layers, said inner layer including at least one conductive signal trace disposed on substrate material proximate to an edge of the interconnection device and being accessible for direct electrical connection with a corresponding signal trace, wherein at least one conductive protrusion is formed on said at least one conductive signal trace, and wherein said protrusion is malleable, and wherein said inner layer substrate material is a ceramic; and

shielding disposed around the at least one signal trace, including a first shielding wall on a layer below the trace, a second shielding wall on a layer above the trace, and third and fourth shielding walls on either side of the trace, the first, second, third and fourth shielding walls being connected such that uninterrupted shielding is provided for 360° around the trace.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CLEARINGHOUSE LLC
Reel/Frame 054305/0505 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CLEARINGHOUSE LLC
To: JEFFERIES FINANCE LLC
Reel/Frame 046485/0644 →
RELEASE (REEL 038041 / FRAME 0001) Recorded Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
SECURITY AGREEMENT Recorded Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2015
From: ROCKSTAR CONSORTIUM US LP; ROCKSTAR CONSORTIUM LLC; BOCKSTAR TECHNOLOGIES LLC; CONSTELLATION TECHNOLOGIES LLC; MOBILESTAR TECHNOLOGIES LLC; NETSTAR TECHNOLOGIES LLC
To: RPX CLEARINGHOUSE LLC
Reel/Frame 034924/0779 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2014
From: ROCKSTAR BIDCO, LP
To: ROCKSTAR CONSORTIUM US LP
Reel/Frame 032436/0804 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2011
From: NORTEL NETWORKS LIMITED
To: ROCKSTAR BIDCO, LP
Reel/Frame 027164/0356 →