IP Library Granted Patent US 6,911,864
Granted Patent B2
US 6,911,864 · App. 09/826,571 · Granted Jun 28, 2005

Circuit, including feedback, for reducing DC-offset and noise produced by an amplifier

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Quick Facts
Patent No.
US 6,911,864
App. No.
09/826,571
Granted
Jun 28, 2005
Kind
B2
Abstract

An amplifier (AMP) is provided with a pair of choppers (CHP i ,CHP o ) in order to reduce the DC-offset and the noise produced by the amplifier (AMP). To obtain an optimal noise reduction the pair of choppers (CHP i ,CHP o ) operate on a high frequency. As a result the DC-offset cancellation is not optimal because a so-called charge injection of the switches in the pair of choppers (CHP i ,CHP o ) produces a DC-offset. To overcome this problem the amplifier (AMP) is further provided with further offset cancellation means which are for example formed by a further pair of choppers (CHP fi ,CHP fo ). This further pair of choppers (CHP fi ,CHP fo ) operates on a relatively low frequency. The combination of the pair of choppers (CHP i ,CHP o ) and the further pair of choppers (CHP fi ,CHP fo ) guarantees an optimal DC-offset cancellation as well as an optimal noise cancellation.

Claims (14)

1. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier and comprising an input chopper coupler to said input of said amplifier and an output chopper coupled to said output of said amplifier; and feedback means for further reducing the DC-offset produced by the amplifier.

2. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier comprising an input chopper arranged in cascade in between the input of the circuit and the input of the amplifier, and an output chopper synchronized with the input chopper, which output chopper is arranged in cascade in between the output of the amplifier and the output of the circuit; and feedback means for further reducing the DC-offset produced by the amplifier.

3. A circuit as claimed in claim 2 , wherein the input chopper and the output chopper are operative as high frequency choppers.

4. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier; and feedback means for further reducing the DC-offset produced by the amplifier wherein the further feedback means for further reducing the DC-offset produced by the amplifier comprises switching means for short-circuiting the input signal under control of a start-up signal; and means for adding back a sampled output signal to the amplifier for adapting the DC-offset of the amplifier.

5. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier; and feedback means for further reducing the DC-offset produced by the amplifier wherein the further feedback means for further reducing the DC-offset produced by the amplifier comprises switching means for short-circuiting the input signal under control of a start-up signal; and means for adding back a sampled output signal to the amplifier for adapting the DC-offset of the amplifier comprising an analog to digital converter with an input coupled to the output of the circuit, and with an output; a digital processing circuit with an input coupled to the output of the analog to digital converter, and an output; and a digital to analog converter with an input coupled to the output of the digital processing circuit, and an output coupled to the amplifier for adapting the DC-offset of the amplifier.

6. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier; and feedback means for further reducing the DC-offset produced by the amplifier further including switching means, responsive to the feedback means, for short-circuiting the input signal under control of a start-up signal; and means for adding back a sampled output signal to the amplifier for adapting the DC-offset of the amplifier.

7. A circuit comprising: an amplifier producing a DC-offset and noise having an input for receiving an input signal from an input of the circuit, and an output for delivering an output signal to an output of the circuit; means for reducing the DC-offset and the noise produced by the amplifier; and feedback means for further reducing the DC-offset produced by the amplifier further including switching means, responsive to the feedback means, for short-circuiting the input signal under control of a start-up signal; and means for adding back a sampled output signal to the amplifier for adapting the DC-offset of the amplifier including an analog to digital converter with an input coupled to the output of the circuit, and with an output; a digital processing circuit with an input coupled to the output of the analog to digital converter, and an output; and a digital to analog converter with an input coupled to output of the digital processing circuit, and an output coupled to the amplifier for adapting the DC-offset of the amplifier.

8. A circuit comprising: an amplifier adapted to amplify an input signal and produce a DC-offset and noise and to deliver an output signal to an output of the circuit; a circuit adapted to respond to the amplifier by reducing the DC-off set and the noise produced by the amplifier including an input chopper arranged in cascade in between the input of the circuit and the amplifier, and an output chopper synchronized with the input chopper, which output chopper is arranged in cascade in between the amplifier and the output of the circuit; and a feedback circuit adapted to further reduce the DC-offset produced by the amplifier.

9. A circuit as claimed in claim 8 wherein the input chopper and the output chopper are operative as high frequency choppers.

10. A circuit comprising: an amplifier adapted to amplify an input signal and produce a DC-offset and noise and to deliver an output signal to an output of the circuit; a circuit adapted to respond to the amplifier by reducing the DC-off set and the noise produced by the amplifier; and a feedback circuit adapted to further reduce the DC-offset produced by the amplifier wherein the feedback circuit includes a switch circuit adapted to short-circuit the input signal under control of a start-up signal; and an adder circuit adapted to add back a sampled output signal to the amplifier and for adapting the DC-offset of the amplifier.

11. A circuit comprising: an amplifier adapted to amplify an input signal and produce a DC-offset and noise and to deliver an output signal to an output of the circuit; a circuit adapted to respond to the amplifier by reducing the DC-off set and the noise produced by the amplifier; and a feedback circuit adapted to further reduce the DC-offset produced by the amplifier wherein the feedback circuit includes a switch circuit adapted to short-circuit the input signal under control of a start-up signal; and an adder circuit adapted to add back a sampled output signal to the amplifier and for adapting the DC-offset of the amplifier including an analog to digital converter with an input coupled to the output of the circuit, and with an output; a digital processing circuit with an input coupled to the output of the analog to digital converter, and an output; and a digital to analog converter with an input coupled to the output of the digital processing circuit, and an output coupled to the amplifier for adapting the DC-offset of the amplifier.

12. A circuit as claimed in claim 11 , wherein the feedback circuit includes a switch circuit adapted to short-circuit the input signal under control of a start-up signal; and an adder circuit adapted to add back a sampled output signal to the amplifier and for adapting the DC-offset of the amplifier.

13. The circuit of claim 1 , wherein the feedback means is coupled between an input of the amplifier and an output of the means for reducing the DC-offset and the noise produced by the amplifier.

14. The circuit of claim 2 , wherein the feedback means is coupled between an output of the output chopper and an input of the amplifier.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043951/0127 →
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0611 →