Exception handling method and apparatus for use in program code conversion
View Patent ↗A method of handling exceptions for use in an emulator ( 20 ) performing program code conversion. Registers (X) of a subject machine ( 11 ) being emulated ( 20 ) are represented by a pair of abstract registers (X A ,X B ) on the target machine ( 31 ), suitably using memory locations of the target machine and/or any available target registers. One of the pair (e.g., Reg X A ) holds a definitive value at entry into a section ( 100 ) of subject code ( 10 ) while the other (e.g., Reg X B ) holds a speculative value which is updated during translation and execution of that section of code. Exceptions are handled by recovering the conditions of the virtual subject machine ( 11 ) upon entry into the section of subject code ( 100 ) using the definitive version of each abstract register (i.e., Reg X A ). Advantageously, the function of the pair of registers (X A ,X B ) is alternated upon successful completion of each section of subject code ( 100 ) such that a definitive version of each register is always available for exception handling while avoiding time consuming copy and storing operations.
1. A method of representing a subject register in an emulator, the method comprising the steps of:
(a) mapping an abstract register representing a subject register of a subject machine to either a first location or to a second location within a target machine; and
(b) alternating mapping of the abstract register between the first and second locations such that one of the first or second locations represents a definitive version of the abstract register for use by the emulator during exception handling, whilst the other of the first or second locations represents a speculative version of the abstract register.
2. A method as claimed in claim 1 , wherein for a predetermined section of subject code, one of the first or second locations holds a definitive value of the abstract register at entry into that section, whilst the other of the first or second locations holds a speculative current value of the abstract register for use during that section.
3. A method as claimed in claim 2 , wherein the step of alternating mapping is performed upon reaching the end of the predetermined section of subject code.
4. A method as claimed in claim 3 , wherein the step of alternating mapping is performed only if the content of the speculative version of the abstract register has been updated during the predetermined section of subject code.
5. A method as claimed in claim 2 , wherein the predetermined section of subject code represents one or more basic blocks of subject code.
6. A method as claimed in claim 2 , wherein the method is for use in an emulator that performs dynamic binary translation.
7. A method as claimed in claim 1 , further comprising:
providing a plurality of abstract registers each representing a register of the subject machine; and
mapping each of the plurality of abstract registers to either a respective one of a first set of locations or a respective one of a second set of locations within the target machine; and
alternating mapping for each of the abstract registers between the respective one of each of the first and second sets of locations.
8. A method as claimed in claim 1 , wherein the first location and the second location are each a memory location or a target register.
9. A method for use in handling exceptions by an emulator performing program code conversion between subject code suitable for a subject processor and target code suitable for a target processor, the method comprising the steps of:
(a) providing at least one abstract register each representing a register of the subject processor;
(b) mapping the or each abstract register to a corresponding pair of locations within the target processor; and
(c) alternating mapping of the or each abstract register between a first of the pair of locations and a second of the pair of locations, such that for a predetermined section of subject code, one of the first or second locations holds a definitive value of the abstract register at entry into that section for use by the emulator during exception handling, whilst the other of the first or second locations holds a speculative current value of the abstract register for updating by the emulator during that section.
10. A method as claimed in claim 9 , wherein the step of alternating mapping is performed upon reaching the end of the predetermined section of subject code.
11. A method as claimed in claim 10 , wherein the step of alternating mapping is performed only for the or each abstract register that has been updated during the predetermined section of subject code.
12. An emulator apparatus, comprising:
an emulator for mapping an abstract register representing a subject register of a subject machine to either a first location or to a second location within a target machine, the emulator for alternating mapping of the abstract register between the first and second locations such that the content of one of the first or second locations represents a definitive version of the abstract register for use by the emulator during exception handling, whilst the other of the first or second locations represents a speculative version of the abstract register.
13. An emulator apparatus for performing program code conversion between subject code suitable for a subject processor and target codes suitable for a target processor, the emulator apparatus comprising:
at least one abstract register each representing a register of the subject processor; and
an emulator for mapping the or each abstract register to a corresponding pair of locations within the target processor, and for alternating mapping of the or each abstract register between a first of the pair of locations and a second of the pair of locations, such that for a predetermined section of subject code, one of the first or second locations holds a definitive value of the abstract register at entry into that section for use by the emulator during exception handling, whilst the other of the first or second locations holds a speculative current value of the abstract register for updating by the emulator during that section.
14. A computer program product containing computer readable instructions for performing a method of representing a subject register in an emulator, the method comprising the steps of:
(a) mapping an abstract register representing a subject register of a subject machine to either a first location or to a second location within a target machine; and
(b) alternating mapping of the abstract register between the first and second locations such that one of the first or second locations represents a definitive version of the abstract register for use by the emulator during exception handling, whilst the other of the first or second locations represents a speculative version of the abstract register.
15. A computer program product containing computer readable instructions for performing program code conversion between subject code suitable for a subject processor and target codes suitable for a target processor, the method comprising the steps of:
(a) providing at least one abstract register each representing a register of the subject processor;
(b) mapping the or each abstract register to a corresponding pair of locations within the target processor; and
(c) alternating mapping of the or each abstract register between a first of the pair of locations and a second of the pair of locations, such that for a predetermined section of subject code, one of the first or second locations holds a definitive value of the abstract register at entry into that section for use by the emulator during exception handling, whilst the other of the first or second locations holds a speculative current value of the abstract register for updating by the emulator during that section.