Device and method for making secure an integrated circuit
View Patent ↗The present invention relates to an integrated circuit device containing a memory area, which comprises, on the one hand, a data memory and a program memory, and on the other hand, a program having N code blocks Bi (i=1, . . . , N). It also relates to a method for making such a device secure. The present invention is characterized in that the memory area has M replicas Cj (j=1, . . . , M) of x program code blocks Bi (x=1, . . . , N), which replicas reside at different addresses in said memory area, and in that said device has selection means for randomly selecting one replica Cj of at least one of the x blocks Bi, as a block replica to be used when executing said program. In particular, the present invention can be applied to smart cards.
1. An integrated circuit device containing a memory area that comprises, a data memory, a program memory, and a program having N code blocks, N being an integer greater than 1,
characterized in that said memory area has M replicas, M being an integer greater than 1, of x program code blocks, x being an integer comprised between 1 and N, wherein said replicas reside at different addresses within said memory area, and in that said device comprises selection means for randomly selecting one replica of at least one of the x blocks as a block replica to be used when executing said program, and
further characterized in that the sums of bit values of at least two addresses among the set of addresses of one replicated block and its M replicas are different.
2. An integrated circuit device containing a memory area that comprises, a data memory, a program memory, and a program having N code blocks, N being an integer greater than 1,
characterized in that said memory area has M replicas, M being an integer greater than 1, of x program code blocks, x being an integer comprised between 1 and N, wherein said replicas reside at different addresses within said memory area, and in that said device comprises selection means for randomly selecting one replica of at least one of the x blocks as a block replica to be used when executing said program, and
further characterized in that, among the set of addresses of one replicated block and its M replicas, one address resides within the program memory and another address resides within the data memory.
3. A device according to claim 2 , characterized in that the device comprises controller means for randomly scheduling block execution.
4. A method for making secure an integrated circuit device containing a memory area that comprises, a data memory, a program memory, and a program having N code blocks, N being an integer greater than 1, characterized in that said method comprises the steps of:
generating, within said memory area, M replicas, M being an integer greater than 1, of x program code blocks, x being an integer comprised between 1 and N, wherein said replicas reside at different addresses within said memory area,
randomly selecting one replica of at lease one of the x blocks as a block replica to be used when executing said program, and
selecting the sums of bit values of at least two addresses among the set of addresses of one replicated block and its M replicas in such a way that they are different.
5. A method for making secure an integrated circuit device containing a memory area that comprises, a data memory, a program memory, and a program having N code blocks, N being an integer greater than 1, characterized in that said method comprises the steps of:
generating, within said memory area, M replicas, M being an integer greater than 1, of x program code blocks, x being an integer comprised between 1 and N, wherein said replicas reside at different addresses within said memory area,
randomly selecting one replica of at lease one of the x blocks as a block replica to be used when executing said program, and
among the set of addresses of a replicated block and its M replicas, selecting an address within the program memory and selecting another address within the data memory.
6. A method according to claim 5 , characterized in that said method comprises the additional step of randomly scheduling block execution.
7. A device according to claim 1 , characterized in that the device comprises controller means for randomly scheduling block execution.
8. A method according to claim 4 , characterized in that said method comprises the additional step of randomly scheduling block execution.