Patent Application
Utility
App. No. 09/832,019
· Confirmation No. 1393
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, SEMICONDUCTOR MEMORY SYSTEM AND CLOCK SYNCHRONOUS CIRCUIT
Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-04-11 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-04-11 | A.PE |
Preliminary Amendment | 3 | View | |
| 2001-04-11 | SPEC |
Specification | 98 | View | |
| 2001-04-11 | CLM |
Claims | 45 | View | |
| 2001-04-11 | ABST |
Abstract | 1 | View | |
| 2001-04-11 | DRW |
Drawings-only black and white line drawings | 35 | View | |
| 2001-04-11 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Hiromasa Noda
Tokyo, JAPAN
Masakazu Aoki
Tokorozawa-shi, JAPAN
Hitoshi Tanaka
Tokyo, JAPAN
Hideyuki Aoki
Takasaki-shi, JAPAN
Attorneys & Agents of Record
Classification
USPC
327/269
Prosecution
- Examiner
- LAM, TUAN THIEU
- Art Unit
- 2836
- Customer No.
- 20457
- Docket No.
- 501.36342VX1
- Confirmation No.
- 1393
Foreign Priority
9-194849
·
1997-07-04
·
JAPAN
Publication
- Pub. No.
- US20010015666A1
- Pub. Date
- 2001-08-23
Patent Term Adjustment
-62days
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2006-12-08
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Quick Facts
- App. No.
- 09/832,019
- Filed
- 2001-04-11
- Granted
- 2002-07-02
- Pub. No.
- US20010015666A1
- Examiner
- LAM, TUAN THIEU
- Art Unit
- 2836
- PTA
- -62 days
External Links