Automatic detector of media interface protocol type
View Patent ↗A detector for determining which interface protocol is in use by a serialiser/deserialiser, and comprising detecting channels composed of clocked delays and bit comparators for detecting the presence of idle signals coded according to either ten-bit or five-bit protocols using either one or two clocks.
1. A detector responsive to 8-bit/10-bit encoded data signals which conform to one of a variety of interface protocols comprising:
a multiplicity of clocked delays providing a plurality of detecting channels each including at least one of said clocked delays
means for clocking respective clock delays of said clocked delays in accordance with respective forms of clock signals at a common rate:
means coupled to selected ones of said clocked delays for detecting the presence of a two-group idle signal conforming to each of said interface protocols and for indicating the said one of the interface protocols to which said data signals actually conform.
2. A detector according to claim 1 wherein said clocked delays and said means for detecting enable the identification of each of four interface protocols characterised respectively by (I) one clock signal which clocks five bits at a time (II) two clock signals each of which clocks five bits at a time (III) one clock signal which clocks ten bits at a time and (IV) two clock signals each of which clocks ten bits at a time.
3. A detector according to claim 1 wherein said clocked delays comprise D-type flip-flops.
4. A detector according to claim 1 wherein said forms of clock signals are complemental forms of a clock signal.
5. A detector according to claim 1 wherein said means for indicating comprise coincidence detectors.
6. A detector according to claim 1 wherein said two-group idle signal comprises a comma code group and a valid code group according to IEEE Standard 802 3.
7. A detector responsive to 8-bit/10-bit encoded data signals which conform to one of a variety of interface protocols comprising:
a multiplicity of D-type flip-flops providing a multiplicity of detecting channels each including at least one of said D-type flip-flop
means for clocking respective ones of said D-type flip-flops in accordance with respective forms of clock signals at a common rate:
comparators coupled to selected ones of said D-type flip-flops for enabling the detection of the presence of a two-group idle signal conforming to each of said interface protocols and
coincidence detectors coupled to the comparators to indicate the said one interface protocol to which said data signals actually conform.
8. A detector according to claim 7 wherein said two-group idle signal consists of a comma code group and a valid code group according to IEEE Standard 802 3.
9. A detector according to claim 8 wherein said comma code group is a K28.5 code group and said valid code group is a D16 2 code group.