IP Library › Granted Patent US 6,388,928
Granted Patent Utility
US 6,388,928 · Confirmation No. 4904

Method and system for reduction of test time for analog chip manufacturing

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2016-07-28 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2016-07-28 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2016-07-21 PA.. Power of Attorney 1 View
2016-07-21 N417 Electronic Filing System Acknowledgment Receipt 2 View
2013-07-31 EBCC.AD Notice of Change of Address Place in File Wrapper Due to Electronic Business Center(EBC) Customer Number Update 1 View
2012-08-14 LET. Miscellaneous Incoming Letter 1 View
2012-08-14 N417 Electronic Filing System Acknowledgment Receipt 2 View
2009-05-27 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2009-05-27 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2009-05-19 PA.. Power of Attorney 1 View
2009-05-19 N417 Electronic Filing System Acknowledgment Receipt 2 View
2009-05-19 R3.73 Assignee showing of ownership per 37 CFR 3.73 2 View
2001-05-10 TRNA Transmittal of New Application 4 View
2001-05-10 SPEC Specification 8 View
2001-05-10 CLM Claims 2 View
2001-05-10 ABST Abstract 1 View
2001-05-10 DRW Drawings-only black and white line drawings 3 View
2001-05-10 OATH Oath or Declaration filed 2 View
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Quick Facts
Patent No.
US 6,388,928
App. No.
09/852,603
Filed
2001-05-10
Granted
2002-05-14
Examiner
DINH, SON T
Art Unit
2824
PTA
-120 days