System and method for overlaying DSL access multiplexer onto existing access systems
View Patent ↗A digital subscriber line access multiplexer overlay onto a digital loop carrier system for transporting high speed digital data over an existing backplane which carries voice, data, and test signals between voice line cards and a carrier line. The voice signals are time division multiplexed into frames. The system includes a data bus interface for impressing the high speed data on a subset of existing backplane buses for transport along the backplane and for retrieving high speed digital data from the backplane buses. The system further includes a plurality of data line cards for connecting to the backplane and backplane subset conductors, the data line cards being adapted to couple the high speed data between the subscriber line and the backplane, whereby the high speed digital data can be routed over the backplane subset to any of the digital data line cards without interfering with the voice signals routed to voice line cards.
1. A test access unit for coupling high speed data in a digital loop carrier system having a plurality of voice line cards, a plurality of digital line cards, and a backplane including a time division multiplexed bus for routing voice data and a test bus, said test access unit comprising:
a data bus interface circuit coupled to route said high speed data to and from said plurality of digital line cards over a subset of said test bus, whereby said high speed data is routed over said backplane to or from said plurality of digital line cards without interfering with said voice data routed over said backplane;
an aggregation multiplexer circuit coupled to aggregate and multiplex said high speed data from, and to demultiplex and deaggregate said high speed data to, said plurality of digital line cards via said data bus interface circuit; and
a digital carrier interface circuit coupled to interface said high speed data between said aggregation multiplexer circuit and a high speed digital network.
2. The test access unit of claim 1 , wherein said subset of said test bus comprises a 4-wire test bus.
3. The test access unit of claim 1 , further comprising:
a plurality of electrical terminations coupled to test at least one of said digital loop carrier system and a component associated therewith.
4. The test access unit of claim 3 , wherein said plurality of electrical terminations are coupled via another subset of said test bus to test at least one of said digital loop carrier system and said component associated therewith.
5. The test access unit of claim 4 , wherein said another subset of said test bus comprises a 2-wire test bus.
6. A data line card for coupling high speed data in a digital loop carrier system having a backplane including a time division multiplexed bus for routing voice data and a test bus, said data line card comprising:
a data bus interface circuit coupled to route said high speed data over a subset of said test bus, whereby said high speed data is routed over said backplane without interfering with said voice data routed over said backplane;
a digital subscriber line termination unit coupled to convert between said high speed data and twisted pair data; and
a broadband line interface circuit coupled to convert between said twisted pair data and information received from a subscriber line.
7. The data line card of claim 6 , wherein said subset of said test bus comprises a 4-wire test bus.
8. The data line card of claim 6 , further comprising:
a test relay configured to isolate said broadband line interface circuit from said subscriber line and to couple said broadband line interface circuit and said subscriber line to another subset of said test bus.
9. The data line card of claim 8 , wherein said another subset of said test bus comprises a 2-wire test bus.
10. The data line card of claim 6 , further comprising:
a voice interface circuit coupled to interface said voice data between said time division multiplexed bus and said broadband line interface circuit.
11. An overlay system for routing high speed data in a digital loop carrier system, said digital loop carrier system having a backplane including a time division multiplexed bus for routing voice data and a test bus, said overlay system comprising:
a plurality of data line cards, each coupled to a subscriber line, and each coupled to route said high speed data between said subscriber line and a subset of said test bus, whereby said high speed data is routed over said backplane without interfering with said voice data routed over said backplane; and
a test access unit coupled to route said high speed data to and from said plurality of digital line cards over said subset of said test bus, and to interface said high speed data with a high speed digital network.
12. The overlay system of claim 11 , wherein each of said plurality of data line cards comprises:
a data bus interface circuit coupled to route said high speed data over said subset of said test bus;
a digital subscriber line termination unit coupled to convert between said high speed data and twisted pair data; and
a broadband line interface circuit coupled to convert between said twisted pair data and information received from said subscriber line.
13. The overlay system of claim 11 , wherein each of said plurality of data line cards further comprises:
a test relay configured to isolate said broadband line interface circuit from said subscriber line and to couple said broadband line interface circuit and said subscriber line to another subset of said test bus.
14. The overlay system of claim 13 , wherein said another subset of said test bus comprises a 2-wire test bus.
15. The overlay system of claim 11 , wherein said subset of said test bus comprises a 4-wire test bus.
16. The overlay system of claim 11 , further comprising:
a voice interface circuit coupled to interface said voice data between said time division multiplexed bus and said broadband line interface circuit.
17. The overlay system of claim 11 , wherein said test access unit comprises:
a data bus interface circuit coupled to route said high speed data to and from said plurality of digital line cards over said subset of said test bus;
an aggregation multiplexer circuit coupled to aggregate and multiplex said high speed data from, and to demultiplex and deaggregate said high speed data to, said plurality of digital line cards via said data bus interface circuit; and
a digital carrier interface circuit coupled to interface said high speed data between said aggregation multiplexer circuit and said high speed digital network.
18. The overlay system of claim 17 , wherein said test access unit further comprises:
a plurality of electrical terminations coupled to test at least one of said digital loop carrier system and a component associated therewith.
19. The overlay system of claim 18 , wherein said plurality of electrical terminations are coupled via another subset of said test bus to test at least one of said digital loop carrier system and said component associated therewith.
20. A method of routing high speed data in a digital loop carrier system, said digital loop carrier system having a backplane including a time division multiplexed bus for routing voice data and a test bus, said method comprising the acts of:
receiving said voice data and said high speed digital data from a subscriber line;
routing said voice data over said time division multiplexed bus and said high speed digital data over a subset of said test bus, whereby said high speed data is routed over said backplane without interfering with said voice data routed over said backplane;
interfacing said high speed data with a high speed digital network; and
sending said voice data and said high speed digital data to said subscriber line.
21. The method of claim 20 , further comprising:
testing at least one of said digital loop carrier system and a component associated therewith via another subset of said test bus.