Digital carrierless amplitude and phase modulation (CAP) transmitter using vector arithmetic structure (VAS)
View Patent ↗A method and apparatus for carrierless amplitude and phase CAP encoding of data in a manner avoiding the use of pulse shaping filters for in-phase and quadrature impulse signals. Specifically, in-phase and quadrature vector arithmetic structures (VAS) to adapt respective in-phase and quadrature impulse components to produce appropriate shaped in-phase and quadrature components.
1. An encoder, comprising:
a constellation generator, responsive to an input bitstream to produce an impulse comprising an in-phase component and a quadrature component, said impulse defining symbols within a constellation of symbols;
a pair of vector arithmetic structures (VAS), each VAS adapting a respective one of said in-phase and quadrature components to produce respective shaped in-phase and quadrature components, wherein each VAS comprises:
a plurality of vector registers (VR) for storing precomputed pulse shaping values; and
a vector arithmetic unit (VAU) for arithmetically processing a selected vector and an accumulated vector, said selected vector comprising a plurality of pre-computed values selected from said vector registers in response to a received component signal; and
a combiner, for combining said shaped in-phase and quadrature components to produce an encoded bitstream.
2. The encoder of claim 1 , wherein said output vector produced by said VAU is stored in an output buffer.
3. The encoder of claim 2 , wherein said output vector produced by said VAU is stored in a vector accumulator (VA) for subsequent arithmetic processing.
4. The encoder of claim 3 , wherein said VAU performs an addition operation in response to said received component signal having a most significant bit (MSB) of a first state, and a subtraction operation in response to said received component signal having a MSB of a second state.
5. The encoder of claim 1 , wherein said constellation of symbols comprise carrierless amplitude and phase (CAP) symbols.
6. The encoder of claim 1 , wherein said constellation of symbols comprise quadrature amplitude modulation (QAM) encoded symbols.
7. The encoder of claim 1 , wherein each VAS processes a received component signal in a manner avoiding a multiplication operation.
8. The encoder of claim 1 , wherein each VAS processes a received component signal in a manner implementing a filtering operation.
9. An encoding method, comprising:
processing an input bitstream to produce an impulse defining symbols within a constellation of symbols, wherein said impulse comprises an in-phase component and a quadrature component;
shaping, using a pair of respective vector arithmetic structures, said in-phase component and said quadrature component to produce respective shaped in-phase and quadrature components; and
combining said shaped in-phase and quadrature components to produce an encoded bitstream;
wherein, for each of said in-phase component and said quadrature component, said shaping comprises arithmetically processing a selected vector and an accumulated vector in response to receiving said respective component, said selected vector comprising a plurality of pre-computed pulse shaping values selected from a plurality of vector registers to impart a desired shape to said respective component.
10. The method of claim 9 , wherein said arithmetically processed component is added to a vector accumulator for subsequent arithmetic processing.
11. The method of claim 10 , wherein said arithmetic processing comprises an addition operation in response to said received component having a most significant bit (MSB) of a first state, and a subtraction operation in response to said received component having an MSB of a second state.
12. The method of claim 9 , wherein said constellation of symbols comprises pulse code modulated (PCM) symbols.