Patent Application
Utility
App. No. 09/874,987
· Confirmation No. 5543
ANALOG STORAGE SEMICONDUCTOR MEMORY THAT USES PLURAL WRITE VOLTAGES AND PLURAL READ VOLTAGES HAVING DIFFERENT VOLTAGES LEVELS
Inventor:
Makoto Nagasue
Abandoned -- Failure to Pay Issue Fee
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-06-07 | TRNA |
Transmittal of New Application | 4 | View | |
| 2001-06-07 | SPEC |
Specification | 22 | View | |
| 2001-06-07 | CLM |
Claims | 6 | View | |
| 2001-06-07 | ABST |
Abstract | 1 | View | |
| 2001-06-07 | DRW |
Drawings-only black and white line drawings | 2 | View | |
| 2001-06-07 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Makoto Nagasue
Tokyo, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/45
Prosecution
- Examiner
- TRAN, ANDREW Q
- Art Unit
- 2824
- Customer No.
- 20987
- Docket No.
- OKI.242
- Confirmation No.
- 5543
Foreign Priority
2001/003600
·
2001-01-11
·
JAPAN
Publication
- Pub. No.
- US20020089867A1
- Pub. Date
- 2002-07-11
from
NAGASUE, MAKOTO
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-06-07
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Quick Facts
- App. No.
- 09/874,987
- Filed
- 2001-06-07
- Pub. No.
- US20020089867A1
- Examiner
- TRAN, ANDREW Q
- Art Unit
- 2824
External Links