Granted Patent
Utility
US 6,552,409
· Confirmation No. 6933
FABRICATION TECHNIQUES FOR ADDRESSING CROSS-POINT DIODE MEMORY ARRAYS
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-06-05 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-06-05 | SPEC |
Specification | 57 | View | |
| 2001-06-05 | CLM |
Claims | 7 | View | |
| 2001-06-05 | ABST |
Abstract | 1 | View | |
| 2001-06-05 | DRW |
Drawings-only black and white line drawings | 17 | View | |
| 2001-06-05 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Carl Taussig
Redwood City, CA
Richard Elder
Palo Alto, CA
Attorneys & Agents of Record
Classification
USPC
257/529
H10D84/00
B82Y10/00
G11C8/10
H10W20/493
H10W90/291
H10W90/00
H10W72/801
H10W70/60
H10W70/641
H10W70/611
G11C17/16
Y10S257/91
Prosecution
- Examiner
- TSAI, HUI JEY
- Art Unit
- 2812
- Docket No.
- 10002972
- Confirmation No.
- 6933
Publication
- Pub. No.
- US20020192895A1
- Pub. Date
- 2002-12-19
Patent Term Adjustment
-102days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2011-03-03
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-07-31
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-10-05
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Quick Facts
- Patent No.
- US 6,552,409
- App. No.
- 09/875,572
- Filed
- 2001-06-05
- Granted
- 2003-04-22
- Pub. No.
- US20020192895A1
- Examiner
- TSAI, HUI JEY
- Art Unit
- 2812
- PTA
- -102 days
External Links