Error generation for adaptive equalizer
View Patent ↗An equalizer comprises: an FIR; a trellis decoder coupled to the FIR; a mapper coupled to the trellis decoder; and a decision feedback equalizer coupled to the mapper. The decision feedback equalizer receives the mapped and scaled output of the trellis decoder as input and an error signal is generated by subtracting an output of the decision feedback equalizer from the input to the trellis decoder.
1. An adaptive equalizer for generating an error signal, the adaptive equalizer comprising:
a summer that receives an input signal and a decision feedback equalizer output signal and provides a difference signal indicative thereof;
a trellis decoder that receives and decodes the difference signal to provide a decoded output signal;
a mapper, which receives the decoded output signal and maps and scales the decoded output signal to provide a mapped and scaled output signal; and
a decision feedback equalizer that receives the mapped and scaled output signal and the difference signal and generates a raw error signal indicative of the difference, and processes (i) the mapped and scaled output signal, (ii) the difference signal and (iii) the raw error signal to provide the decision feedback equalizer output signal.
2. An adaptive equalizer comprising:
a FIR filter having a FIR filter output;
a trellis decoder having a trellis decoder input coupled to the FIR filter output;
a mapper coupled to the trellis decoder, having a mapper input, a first mapped and scaled output and a second mapped and scaled output, the mapper being coupled to the trellis decoder output; and
a decision feedback equalizer having a DFE input and a DFE output, wherein the DFE input is coupled to the first mapped and scaled output;
wherein an error signal is generated by subtracting the trellis decoder input from the second mapped and scaled output.
3. An adaptive equalizer, comprising:
a summer that receives an input signal and an equalizing data signal, and provides a difference signal indicative thereof;
a trellis decoder that receives the difference signal and provides a decoded output signal;
a mapper that receives the decoded output signal, and maps and scales the decoded output signal to provide a mapped and scaled output signal; and
a decision feedback equalizer that receives and processes (i) the mapped and scaled output signal and (ii) the difference signal to provide the equalizing data signal.
4. The adaptive equalizer of claim 3 , wherein the trellis decoder comprises a Viterbi decoder.
5. The adaptive equalizer of claim 1 , comprising:
a filter that receives and filters a signal to provide the input signal.
6. The adaptive equalizer of claim 1 , wherein the trellis decoder comprises a Viterbi decoder.
7. The adaptive equalizer of claim 1 , wherein the adaptive equalizer is configured and arranged to process 8VSB signals.
8. The adaptive equalizer of claim 1 , wherein the adaptive equalizer is configured and arranged to process quadrature amplitude modulation (QAM) signals.
9. The adaptive equalizer of claim 1 , wherein the adaptive equalizer is configured and arranged to process offset quadrature amplitude modulation (QAM) signals.
10. The adaptive equalizer of claim 7 , wherein the trellis decoder comprises at least sixteen stages.
11. The adaptive equalizer of claim 2 , wherein the adaptive equalizer is configured and arranged to process 8VSB signals, and the trellis decoder comprises at least sixteen stages.
12. The adaptive equalizer of claim 11 , wherein the decision feedback, equalizer also receives the error signal and processes the first mapped and scaled output and the error signal to generate the DFE output, and the trellis decoder comprises a Viterbi detector.
13. The adaptive equalizer of claim 3 , comprising:
a filter that receives and filters a signal to provide the input signal.
14. The adaptive equalizer of claim 13 , wherein the input signal is a vestigial sideband encoded signal, and the trellis decoder comprises at least sixteen stages.
15. An adaptive equalizer comprising:
a trellis decoder having a trellis decoder input and a trellis decoder output;
a mapper coupled to the trellis decoder output, having a mapper input, a first mapped and scaled output and a second mapped and scaled output; and
a decision feedback equalizer having a DFE input and a DFE output, wherein the DFE input is coupled to the first mapped and scaled output;
wherein an error signal is generated by subtracting the trellis decoder input from the second mapped and scaled output.
16. The adaptive equalizer of claim 15 , wherein the decision feedback equalizer also receives the error signal and processes the first mapped and scaled output and the error signal to generate the DFE output.
17. The adaptive equalizer of claim 16 , wherein the trellis decoder comprises a Viterbi detector.
18. The adaptive equalizer of claim 16 , wherein the adaptive equalizer is configured and arranged to process an amplitude modulated signal.