IP Library Granted Patent US 6,851,110
Granted Patent B2
US 6,851,110 · App. 09/876,655 · Granted Feb 1, 2005

Optimizing an executable computer program having address-bridging code segments

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Quick Facts
Patent No.
US 6,851,110
App. No.
09/876,655
Granted
Feb 1, 2005
Kind
B2
Abstract

Method and apparatus for optimizing an executable computer program having address-bridging code segments. Various embodiments are described for optimizing an executable computer program that occupies a first address space and has address-bridging code segments. Address-bridging code segments, target code segments referenced by the address-bridging segments, and calling code segments that reference the address-bridging segments are identified during execution of the program. A second address space is allocated for storage of relocated functions. The calling code segments and the target code segments are relocated to the second address space, and references to the address-bridging code segments are replaced with references to the target code segments in the second address space. For references to the calling code segments in the first address space, control is directed to the calling code segments in the second address space.

Claims (45)

1. A computer-implemented method for optimizing an executable computer program that occupies a first address space and having address-bridging code segments, comprising:

identifying address-bridging code segments, target code segments referenced by the address-bridging segments, and calling code segments that reference the address-bridging segments during execution of the program;

allocating a second address space;

relocating the calling code segments and the target code segments to the second address space;

replacing references to the address-bridging code segments with references to the target code segments in the second address space; and

for references to the calling code segments in the first address space, directing control to the calling code segments in the second address space.

2. The method of claim 1 , further comprising:

identifying target code segments that are reached during execution; and

relocating only code segments that are reached during execution.

3. The method of claim 2 , wherein each of the calling code segments in the first address space includes a branch instruction having a target address that references an address-bridging code segment and further comprising replacing target addresses of the branch instructions in the relocated calling code segments with addresses that reference the relocated target code segments.

4. The method of claim 3 , wherein the first address space has a size that is greater than a range reachable by direct branch instructions, and the second address space has a size that is within the range of direct branch instructions.

5. The method of claim 1 , wherein each of the calling code segments in the first address space includes a branch instruction having a target address that references an address-bridging code segment and further comprising replacing target addresses of the branch instructions in the relocated calling code segments with addresses that reference the relocated target code segments.

6. The method of claim 1 , wherein the first address space has a size that is greater than a range reachable by direct branch instructions, and the second address space has a size that is within the range of direct branch instructions.

7. An apparatus for optimizing an executable computer program that occupies a first address space and having address-bridging code segments, comprising:

means for identifying address-bridging code segments, target code segments referenced by the address-bridging segments, and calling code segments that reference the address-bridging segments during execution of the program;

means for allocating a second address space;

means for relocating the calling code segments and the target code segments to the second address space;

means for replacing references to the address-bridging code segments with references to the target code segments in the second address space; and

means, for references to the calling code segments in the first address space, for directing control to the calling code segments in the second address space.

8. A computer-implemented method for optimizing an executable computer program that occupies a first address space and having address-bridging code segments, comprising:

replacing function entry points in the executable program with breakpoints; allocating a second address space;

executing the program;

for each executed function, relocating the executed function to the second address space and restoring the function entry point of the relocated function;

for each first relocated function that references a second relocated function via a branch instruction to an address-bridging code segment, changing the branch instruction to directly reference the second relocated function; and

for each relocated function, replacing the function entry point in the first address space with a branch instruction that references the relocated function.

9. The method of claim 8 , further comprising relocating only functions that are reached during execution.

10. The method of claim 9 , further comprising:

for each branch instruction in a relocated function that targets an address-bridging code segment, replacing the branch instruction with a breakpoint;

upon reaching a breakpoint in a relocated function, relocating a function referenced by the address-bridging segment to the second address space and replacing the breakpoint with a branch instruction targeting the function referenced by the address-bridging code segment.

11. The method of claim 10 , further comprising:

for each branch instruction in a relocated function that targets an address-bridging code segment, recording an address of the branch instruction in association with a target of the address-bridging code segment; and

if a newly relocated function is referenced by a recorded target of an address-bridging code segment, then changing the branch instruction at the address associated with the recorded target to target the newly relocated function.

12. The method of claim 8 , further comprising:

for each branch instructions in a relocated function that targets an address-bridging code segment, replacing the branch instruction with a breakpoint;

upon reaching a breakpoint in a relocated function, relocating a function referenced by the address-bridging segment to the second address space and replacing the breakpoint with a branch instruction targeting the function referenced by the address-bridging code segment.

13. The method of claim 8 , further comprising:

for each branch instruction in a relocated function that targets an address-bridging code segment, recording an address of the branch instruction in association with a target of the address-bridging code segment; and

if a newly relocated function is referenced by a recorded target of an address-bridging code segment, then changing the branch instruction at the address associated with the recorded target to target the newly relocated function.

14. An apparatus for optimizing an executable computer program that occupies a first address space and having address-bridging code segments, comprising:

means for replacing function entry points in the executable program with breakpoints;

means for allocating a second address space;

means for executing the program;

means, for each executed function, for relocating the executed function to the second address space and restoring the function entry point of the relocated function;

means, for each first relocated function that references a second relocated function via a branch instruction to an address-bridging code segment, for changing the branch instruction to directly reference the second relocated function; and

means, for each relocated function, for replacing the function entry point in the first address space with a branch instruction that references the relocated function.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2021
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 056157/0492 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →