IP Library Granted Patent US 6,728,942
Granted Patent Utility
US 6,728,942 · Confirmation No. 4100

METHOD AND SYSTEM FOR PREDICTIVE MOSFET LAYOUT GENERATION WITH REDUCED DESIGN CYCLE

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Code Description Pages PDF
2021-11-26 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2021-11-26 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2021-11-19 PA.. Power of Attorney 2 View
2021-11-19 N417 Electronic Filing System Acknowledgment Receipt 2 View
2021-11-19 R3.73 Assignee showing of ownership per 37 CFR 3.73 3 View
2004-03-08 IFEE Issue Fee Payment (PTO-85B) 3 View
2004-02-03 LET. Miscellaneous Incoming Letter 2 View
2001-06-12 TRNA Transmittal of New Application 3 View
2001-06-12 SPEC Specification 31 View
2001-06-12 CLM Claims 7 View
2001-06-12 ABST Abstract 1 View
2001-06-12 DRW Drawings-only black and white line drawings 9 View
2001-06-12 OATH Oath or Declaration filed 4 View
2001-06-12 LET. Miscellaneous Incoming Letter 1 View
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Quick Facts
Patent No.
US 6,728,942
App. No.
09/879,142
Filed
2001-06-12
Granted
2004-04-27
Pub. No.
US20020188920A1
Art Unit
2825
PTA
-61 days