Conditionally nonblocking switch of the expander type
View Patent ↗Broadband switching including the implementation of and control over a massive sub-microsecond switching fabric. To effect the attributes of the switching fabric, conditionally nonblocking components are used a building-blocks in an interconnection network which is recursively constructed. The properties of the interconnection network are preserved during each recursion to thereby configure the massive switching fabric from scalable circuitry.
1. A method for implementing a class of N×N expanders each serving a connection request to route m incoming signals, m≦N and for enabling the service of any connection request in a nonblocking way on the condition that the connection request is compliant to certain constraints, the method for each of the expanders comprising:
configuring a switch defined by a set of connection states and having an array of N input ports with N distinct input addresses and an array of N output ports with N distinct output addresses wherein the m incoming signals arrive at m input ports determining m active input addresses and are destined for a total of n, m≦n≦N, distinct output ports determining n active output addresses, and wherein said constraints on the connection request are that: (1) the m active input addresses are consecutive upon a rotation of the ordering of the N input addresses, and (2) for any two active input addresses i and j and any two active output addresses p and q such that i is being connected to p and j is being connected to q, if i precedes j with respect to the rotated ordering, then p<q, and
routing the incoming signals from said m input ports to said n distinct output ports by activating one of the connection states such that the activated one of the connection states accommodates the connection request subject to said constraints on the connection request,
said class excluding (i) those having a switch constructed from a banyan network of expander cells prepended with a shuffle exchange and (ii) those having a switch constructed from the shuffle-exchange network of expander cells prepended with the shuffle exchange.
2. The method as recited in claim 1 wherein the configuring includes constructing the switch as an N×N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another switch.
3. The method as recited in claim 1 wherein the configuring includes constructing the switch as an N×N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with an expander.
4. The method as recited in claim 1 wherein the configuring includes constructing the switch as a two-stage interconnection network composed of a first stage of nodes being the input nodes and a second stage of nodes being the output nodes, an interstage exchange, and an input exchange corresponding to the interstage exchange prepended to the network, and wherein each node is filled with an expander.
5. The method as recited in claim 1 wherein the configuring includes constructing the switch as an ×2 interconnection network having nodes and wherein each node is filled with an expander.
6. The method as recited in claim 1 wherein the configuring includes constructing the switch as an ×2 interconnection network having nodes and wherein the nodes are filled with a plurality of expanders.
7. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive ×2 interconnection network having nodes and wherein each node is filled with an expander.
8. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive ×2 interconnection network having nodes and wherein the nodes are filled with a plurality of expanders.
9. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive ×2 interconnection network having nodes and wherein each of the nodes is a cell and each cell is filled with a 2×2 expander.
10. The method as recited in claim 9 wherein the 2×2 expander is an expander cell.
11. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive ×2 interconnection network of cells with each cell filled with a 2×2 expander.
12. The method as recited in claim 11 wherein the 2×2 expander is an expander cell.
13. The method as recited in claim 1 wherein the configuring includes constructing the switch as a banyan-type network whose trace and guide are both monotonically increasing and wherein each of the 2×2 nodes of the banyan-type network is filled with a 2×2 expander.
14. The method as recited in claim 13 wherein the 2×2 expander is an expander cell.
15. The method as recited in claim 1 wherein the configuring includes constructing the switch as a recursive plain 2-stage interconnection network of cells prepended with a swap exchange and wherein each cell of the network is filled with a 2×2 expander.
16. The method as recited in claim 15 wherein the 2×2 expander is an expander cell.
17. The method as recited in claim 1 wherein the configuring includes constructing the switch as a divide-and-conquer network of cells prepended with a swap exchange and wherein each cell of the network is filled with a 2×2 expander.
18. A class of N×N expanders each serving a connection request to route m incoming signals, m≦N and for enabling the service of any connection request in a nonblocking way on the condition that the connection request is compliant to certain constraints, each of the expanders comprising:
a switch defined by a set of connection states and having an array of N input ports with N distinct input addresses and an array of N output ports with N distinct output addresses wherein the m incoming signals arrive at m input ports determining m active input addresses and are destined for a total of n, m≦n≦N distinct output ports determining n active output addresses, and wherein said constraints on the connection request are that: (1) the m active input addresses are consecutive upon a rotation of the ordering of the N input addresses and (2) for any two active input addresses i and j and any two active output addresses p and q such that i is being connected to p and j is being connected to q, if i precedes j with respect to the rotated ordering, then p<q, and
control circuitry, coupled to the switch, for routing the incoming signals from said m input ports to said n distinct output ports by activating one of the connection states such that the activated one of the connection states accommodates the connection request subject to said constraints on the connection request,
said class excluding (i) those having a switch constructed from a banyan network of expander cells prepended with a shuffle exchange and (ii) those having a switch constructed from the shuffle-exchange network of expander cells prepended with the shuffle exchange.
19. The expander as recited in claim 18 wherein the switch is constructed by an N×N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another switch.
20. The expander as recited in claim 18 wherein the switch is constructed by an N×N k-stage switching network composed of k stages of nodes, an interstage exchange between any succeeding two of the k stages, an input exchange and an output exchange, and wherein each node is filled with another expander.
21. The expander as recited in claim 18 wherein the switch is constructed from a two-stage interconnection network composed of a first stage of nodes being the input nodes and a second stage of nodes being the output nodes, an interstage exchange, and an input exchange corresponding to the interstage exchange prepended to the network, and wherein each node is filled with another expander.