Multi-die module
View Patent ↗A multi-die module is electrically connected to both an unpackaged die and a packaged die as disclosed herein. The multi-die module has a footprint that is the same as conventional multi-die packages, which do not include packaged die, thereby allowing the multi-die module to be interchangeable with conventional multi-die packages. In one embodiment, the unpackaged die is a graphics processor, and the packaged die is a standard memory that has been burned in, functionally tested, and speed rated.
1. A device comprising:
a package module including a substrate having a standard package footprint;
an unpackaged semiconductor die directly attached to the package module, the unpackaged semiconductor die encapsulated onto the package module in a structure having a planar top surface; and
a separately pre-packaged semiconductor die having a top surface and attached to the package module;
wherein the planar top surface of the encapsulated structure and the top surface of the pre-packaged semiconductor die are of equal distance from the substrate.
2. The device as in claim 1 , wherein the pre-package semiconductor is packaged in a ball grid array package.
3. The device as in claim 1 , wherein the unpackaged semiconductor die is a graphics processor.
4. The device as in claim 1 , wherein the pre-packaged semiconductor is a memory.
5. The device as in claim 1 , wherein a plurality of pre-packaged semiconductor are attached to the package module.
6. The device as in claim 1 , wherein the unpackaged semiconductor die is wire bonded to the package module.
7. The device as in claim 1 , wherein attached includes surface-mount technology reflow.
8. The device as in claim 1 , wherein the encapsulated structure has a footprint greater than the footprint of the unpackaged semiconductor die.
9. The device as in claim 8 , wherein the encapsulated semiconductor die forms a substantially rectangular structure on the package module.
10. The device as in claim 1 , wherein the footprint size of the package module is one of 35 mm×35 mm, 31 mm×31 mm, 27 mm×27 mm, 37.5 mm×37.5 mm, 40 mm×40 mm, 42 mm×42 mm, or 42.5mm×42.5 mm.
11. The device as in claim 1 , further including a heat sink.
12. The device in claim 11 , wherein a top surface of the unpackaged semiconductor die and a top surface of the pre-packaged semiconductor are of substantially equal distance from a surface of the package module.
13. The device of claim 1 , further including a planar heat sink adapted to engage the encapsulated structure and the top surface of the pre-packaged semiconductor.
14. The device of claim 1 wherein said unpackaged semiconductor die is at least partially encapsulated on the package module.
15. A device comprising:
a package module sized to be interchangeable with standard package sizes;
a graphics-processing die directly attached to the package module, the graphics-processing die encapsulated on the package module in a structure having a planar top surface; and
a separately pre-packaged memory die having a top surface and attached to the package module;
wherein the planar top surface of the encapsulated structure and the top surface of the pre-packaged memory die are of equal distance from the package module.
16. The device as in claim 15 , wherein the graphics processing die is wire bonded to the package module.
17. The device as in claim 15 , wherein a plurality of pre-packaged memory die are attached to the package module.
18. The device as in claim 15 , wherein directly attached includes the graphics processing die being wire bonded to the package module.
19. The device as in claim 15 , wherein attached includes surface-mount technology reflow.
20. The device as in claim 15 , wherein the standard package sizes include one of 35 mm×35 mm, 31 mm×31 mm, 27 mm×27 mm, 37.5 mm×37.5 mm, 40 mm×40 mm, 42 mm×42 mm, or 42.5 mm×42.5 mm.
21. The device as in claim 15 , further including a heat sink.
22. The device in claim 21 , wherein a top surface of the graphics-processor die and a top surface of the pre-packaged memory die are of substantially equal distance from a surface of the package module.
23. The device of claim 15 wherein said graphics-processing die is at least partially encapsulated on the package module.
24. A multi-die module, comprising:
a substrate having a first surface and a second surface;
an unpackaged semiconductor die mounted to the first surface of the substrate, the semiconductor die encapsulated in a structure having a planar top surface; and
a separately pre-packaged semiconductor die having a top surface and mounted on the first surface of the substrate;
wherein the planar top surface of the encapsulated structure and the top surface of the pre-packaged semiconductor die are of equal distance from the substrate.
25. The multi-die module as in claim 24 , further including a second pre-packaged semiconductor die mounted on the first surface of the substrate.
26. The multi-die module as in claim 24 , further including a plurality of unpackaged semiconductor die mounted on the first surface of the substrate.
27. The multi-die module as in claim 24 , wherein the unpackaged semiconductor die is mounted to the first surface of the substrate by wire bonding.
28. The multi-die module as in claim 24 , wherein the encapsulating structure is further comprised of an encapsulating material including epoxy, metal cap or silicon coatings.
29. The multi-die module as in claim 24 , further including a heat sink.
30. The multi-die module as in claim 24 , wherein the unpackaged semiconductor die is a graphics processor.
31. The multi-die module as in claim 24 , wherein the pre-packaged semiconductor die is a memory.
32. The multi-die module of claim 24 wherein the unpackaged semiconductor die is at least partially encapsulated in a structure having a planar top surface.
33. A multi-die module, comprising:
a substrate having a first surface;
an unpackaged semiconductor die mounted to the first surface of the substrate, the semiconductor die encapsulated in a structure having planar top surface; and
a separately pre-packaged semiconductor die on the first surface of the substrate, wherein the encapsulating structure is further comprised of an encapsulating material of a metal cap; wherein the planar top surface of the encapsulated structure and the top surface of the pre-packaged semiconductor die are of equal distance from the substrate.
34. The multi-die module of claim 33 wherein the unpackaged semiconductor die is at least partially encapsulated.
35. A multi-die module, comprising:
a substrate having a first surface;
an unpackaged semiconductor die mounted to the first surface of the substrate, the semiconductor die encapsulated in a structure having a planar top surface, and
a separately pre-packaged semiconductor die having a top surface and mounted on the first surface, of the substrate;
wherein the planar top surface of the encapsulated structure and the top surface of the pre-packaged semiconductor die are of equal distance from the substrate.
36. The multi-die module of claim 35 wherein the unpackaged semiconductor die is at least partially encapsulated.