Granted Patent B2

US 7,164,662 · App. 09/888,085 · Granted Jan 16, 2007

Abstract

Claims (43)

1. A method for identifying network delay, comprising:

receiving tones that represent a sequence of bits, one of the bits identified as a reference bit;

sampling the tones beginning at a selected sample start time;

demodulating the tone samples to identify the bit values in a synchronization flag;

synchronizing with the tone samples by shifting the sample start time until the tone samples generate an optimum synchronization value; and

deriving a reference time according to the reference bit at the optimum synchronization value.

2. A method according to claim 1 including:

identifying an initial rime when the reference bit is first transmitted to a mobile station;

receiving the sequence of bits back from the mobile station;

synchronizing with the sequence of bits;

identifying a final time when the reference bit is received in the synchronized sequence of bits; and

denying a delay time by comparing the initial time wit the final time.

3. A method according to claim 1 wherein the tones are received over a voice channel in a wireless cellular network.

4. A method according to claim 1 including:

sampling the tones for a first frequency representing a binary 1 value;

sampling the tones for a second frequency representing a binary 0 value;

generating synchronization values by comparing the tone samples for the first frequency with the tone samples for the second frequency; and

shifting the sample start time for the tone samples for the first frequency and second frequency until the optimum synchronization value is derived.

5. A method according to claim 4 including deriving the reference rime by identifying one of the tone samples at the optimum synchronization value associated with the reference bit.

6. A method according to claim 1 including formatting the sequence of bits into a packet and synchronizing with the sequence of bits in the packet.

7. A method according to claim 6 including inserting bits in the packet that identify a turn around time representing an amount of time required to process the packer containing the sequence of bits.

8. A computer readable medium containing code executable on a processor for identifying network delay in a communications network the stored code comprising:

code for controlling the processor to receive tones that represent a sequence of bits;

code for controlling the processor to sample the tones beginning at a selected sample start time;

code for controlling the processor to demodulate the sampled tones back into bit values representing the sequence of bits;

code for controlling the processor to synchronize with the sequence of bits by shifting the sample start time until the sampled tones generate an optimum synchronization value; and

code for controlling the processor to derive a reference time according to the sample start time at the optimum synchronization value.

9. A computer readable medium containing code executable on a processor according to claim 8 including:

code for controlling the processor to identify an initial time when the sequence of bits are first transmitted;

code for controlling the processor to receive the sequence of bits back from a remote station;

code for controlling the processor to synchronize with the returned sequence of bits;

code for controlling the processor to identify a final rime according to the synchronized returned sequence of bits; and to derive a network delay time by comparing the initial time with the final time.

10. A computer readable medium containing code executable on a processor according to claim 8 wherein the tones are received over a voice channel in a network.

11. A computer readable medium containing code executable on a processor according to claim 8 including:

code for controlling the processor to sample the tones for a first frequency representing a binary 1 value;

code for controlling the processor to sample the tones for a second frequency representing a binary 0 value;

code for controlling the processor to generate synchronization values by comparing the tone samples for the first frequency with the tone samples for the second frequency; and

code for controlling the processor to shift the sample start time for the tone samples of the first frequency and second frequency until the optimum synchronization value is derived.

12. A computer readable medium containing code executable on a processor according to claim 8 including:

code for controlling the processor to receive a packet having a preamble that identifies the sequence of bits; and

code for controlling the processor to synchronize with the sequence of bits in the packet.

13. A computer readable medium containing code executable on a processor according to claim 12 including code for controlling the processor to insert bits in the packet that identify a turn around time representing an amount of time required to process the packet containing the sequence of bits.

14. A computer readable medium containing code executable on a processor according to claim 12 wherein the processor is disposed in a cell phone.

Assignments (8)