High speed network protocol stack in silicon
View Patent ↗An apparatus comprising a media access controller (MAC), a configurable packet switch, and a network protocol stack in silicon. The network protocol stack may be configured to couple the media access controller to the configurable packet switch.
1. An apparatus comprising:
a media access controller (MAC);
a configurable packet switch;
a high bandwidth bus configured to couple said apparatus to (i) one or more external devices and (ii) a protocol mapper; and
a network protocol stack in silicon coupling said media access controller to said configurable packet switch.
2. The apparatus according to claim 1 , wherein said network protocol stack comprises a TCP/IP stack.
3. The apparatus according to claim 2 , wherein said network protocol stack comprises a TCP/IP/UDP stack.
4. The apparatus according to claim 1 , further comprising:
a security port configured to couple an external security protocol processor to said apparatus.
5. The apparatus according to claim 1 , further comprising:
embedded SSL and IPSec processing functionality.
6. The apparatus according to claim 1 , wherein said bus comprises a RapidIO (RIO) bus.
7. The apparatus according to claim 1 , wherein said bus comprises a PCI bus, a PCI-X bus, or a SPI-4 bus.
8. The apparatus according to claim 1 , wherein said protocol mapper comprises bus is configured to couple said apparatus to a iSCSI/iFC mapper.
9. The apparatus according to claim 8 , wherein said iSCSI/iFC mapper comprises a programmable logic device configured to add and strip iSCSI and/or iFC protocol wrappers.
10. The apparatus according to claim 9 , wherein said iSCSI/iFC mapper comprises an embedded programmable logic circuit (EPLC).
11. The apparatus according to claim 1 , further comprising:
a buffer configured to couple said media access controller to said network protocol stack.
12. The apparatus according to claim 1 , further comprising:
an interface circuit configured to couple said apparatus to a host processor.
13. The apparatus according to claim 1 , further comprising an interface circuit configured to couple said network protocol stack to a memory.
14. The apparatus according to claim 13 , wherein said interface circuit comprises a double data rate (DDR) interface.
15. The apparatus according to claim 1 , wherein said media access controller is configured to couple said apparatus to a physical layer device having an operating speed configurable to any rate in the group consisting of 100 Mbps, 1 Gbps, and 10 Gbps.
16. The apparatus according to claim 1 , wherein said media access controller (MAC) comprises an ethernet MAC.
17. The apparatus according to claim 1 , wherein said configurable packet switch is configured to send SCSI packets to either a high speed bus port or a microprocessor.
18. An apparatus comprising:
means for coupling to a physical layer of a network;
means for sending packets to any of a plurality of locations;
means for coupling said apparatus to (i) one or more external devices and (ii) a protocol mapper, using a high bandwidth bus; and
means for running multiple protocol layers simultaneously at greater than 1 Gbps rates, said running means coupled between said coupling means and said sending means.
19. A method for coupling components of a storage area network (SAN) via an internet-work packet (IP) network comprising the steps of:
receiving and sending packets to a physical layer of said internet-work packet (IP) network;
running an IP protocol layer and at least one other protocol layer simultaneously at greater than 1 Gbps rates; and
sending SCSI packets to either a high speed bus port or a microprocessor and coupling said components to (i) one or more external devices and (ii) a protocol mapper, using a high bandwidth bus.