Packet switching apparatus including cascade ports and method for switching packets
View Patent ↗A switching device comprises at least two base racks, each base rack including a switch card in communication with a line card across a backplane, the line card having at least an external port. The at least two base racks are coupled such that the switch cards of each are linked. A method for switching a packet comprises introducing the packet into an external port on a first base rack, transmitting the packet from a first cascade port on the first base rack to a second cascade port on a second base rack, and sending the packet out of the second base rack through a second external port.
1. A method for switching a packet comprising:
introducing the packet into a first port of a first line card of a first base rack;
transmitting the packet from the first line card through a first backplane to a first switch card of the first base rack;
transmitting the packet across a connector which joins a first cascade port on the first switch card to a second cascade port on a second switch card of a second base rack coupled to the first switch card; wherein the connector includes an optical fiber and wherein transmitting the packet from the first cascade port to the second cascade port includes converting the packet to an optical signal;
transmitting the packet from the second switch card through a second backplane to a second line card on the second base rack; and
transmitting the packet out of a second port of the second base rack.
2. The method of claim 1 wherein transmitting the packet from the first switch card to the second switch card includes a reading a second port number and determining the second port number is associated with the second base rack.
3. The method of claim 1 wherein transmitting the packet from the first cascade port on the first switch card to the second cascade port on the second switch card further includes buffering the packet on the second switch card.
4. The method of claim 1 wherein introducing the packet into the first port of the first line card includes converting the packet from an optical signal to an electrical signal.
5. The method of claim 4 wherein introducing the packet into the first port of the first line card further includes performing a physical layer conversion.
6. The method of claim 5 wherein introducing the packet into the first port of the first line card further includes performing fast-path packet processing.
7. The method of claim 5 wherein introducing the packet into the first port of the first line card further includes performing slow-path packet processing.
8. The method of claim 1 wherein transmitting the packet through the first backplane includes segmenting the packet into at least one cell.
9. The method of claim 8 wherein segmenting the packet creates a payload of 64 bytes.
10. The method of claim 8 wherein segmenting the packet creates a payload of 128 bytes.
11. The method of claim 1 wherein transmitting the packet through the second backplane includes placing the packet in a priority output queue on the second switch card.
12. The method of claim 11 wherein transmitting the packet through the second backplane further includes scheduling to use the second port.
13. The method of claim 1 wherein transmitting the packet out of a second port of the second base rack includes processing the packet by the second line card.
14. The method of claim 13 wherein processing the packet includes reassembling at least one cell into the packet.
15. The method of claim 13 wherein processing the packet further includes performing a physical layer conversion.
16. The method of claim 13 wherein processing the packet further includes converting the packet from an electrical signal to an optical signal.
17. The method of claim 1 wherein transmitting the packet from the first line card includes buffering the packet in a set of queues associated with a packet processor on the line card.
18. The method of claim 1 wherein transmitting the packet to the first switch card includes buffering the packet in a set of queues associated with a flow control ASIC on the switch card.
19. The method of claim 8 wherein transmitting the packet from the first switch card to the second switch card includes routing the packet through a crossbar on the first switch card and buffering the packet in a first queue dedicated to a cascade port on the first base rack.
20. The method of claim 1 wherein transmitting the packet from the second switch card through the second backplane includes routing the packet through a crossbar on the second switch card and buffering the packet in a queue between the crossbar and the second backplane.
21. The method of claim 1 wherein transmitting the packet through the second backplane to a second line card includes buffering the packet in a queue on the second line card dedicated to a destination port.
22. A method for switching a packet comprising:
introducing the packet into a first port of a first line card of a first base rack;
transmitting the packet from the first line card through a first backplane to a first switch card of the first base rack by segmenting the packet into at least one cell; wherein segmenting the packet includes:
staging packet data at an SRAM;
waiting for packet header processing to be completed;
placing a request for first backplane arbitration into a priority queue;
winning first backplane arbitration; and
reading packet data from the SRAM;
transmitting the packet from the first switch card to a second switch card of a second base rack coupled to the first switch card;
transmitting the packet from the second switch card through a second backplane to a second line card on the second base rack; and
transmitting the packet out of a second port of the second base rack.
23. The method of claim 22 wherein segmenting the packet additionally includes reading a cell-size from an SRAM and high-speed serial transmission of the at least one cell across the first backplane to the first switch card.
24. The method of claim 22 wherein segmenting the packet additionally includes placing the at least one cell in a buffer on a first Flow Control ASIC (FLC) on the first switch card.
25. A method for switching a packet comprising:
introducing the packet into a first port of a first line card of a first base rack;
transmitting the packet from the first line card through a first backplane to a first switch card of the first base rack;
transmitting the packet from the first switch card to a second switch card of a second base rack coupled to the first switch card;
transmitting the packet from the second switch card through a second backplane to a second line card on the second base rack by:
placing the packet in a priority output queue on the second switch card;
scheduling to use the second port;
sending the packet from a first FLC to a crossbar;
routing the packet through the crossbar; and
buffering the packet at an egress buffer on a second FLC;
transmitting the packet out of a second port of the second base rack.
26. The method of claim 25 wherein transmitting the packet through the second backplane further includes determining a credit at a receiving queue on the second line card end high-speed serial transmission of the packet across the second backplane.
27. A method for switching a packet comprising:
introducing the packet into a first port of a first line card of a first base rack;
transmitting the packet from the first line card through a first backplane to a first switch card of the first base rack;
transmitting the packet from the first switch card to a second switch card of a second base rack coupled to the first switch card by:
routing the packet through a crossbar on the first switch card;
buffering the packet in a first queue dedicated to a cascade port on the first base rack; and
buffering the packet in a second queue associated with a flow control ASIC on the second switch card;
transmitting the packet from the second switch card through a second backplane to a second line card on the second base rack; and
transmitting the packet out of a second port of the second base rack.