Granted Patent
Utility
US 6,677,644
· Confirmation No. 5820
SEMICONDUCTOR INTEGRATED CIRCUIT HAVING LOW VOLTAGE AND HIGH VOLTAGE TRANSISTORS
Inventor:
Yoshifumi Yoshida
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2003-10-30 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2003-10-30 | FRPR |
Certified Copy of Foreign Priority Application | 17 | View | |
| 2001-06-28 | TRNA |
Transmittal of New Application | 3 | View | |
| 2001-06-28 | SPEC |
Specification | 22 | View | |
| 2001-06-28 | CLM |
Claims | 3 | View | |
| 2001-06-28 | ABST |
Abstract | 2 | View | |
| 2001-06-28 | DRW |
Drawings-only black and white line drawings | 3 | View |
Inventors
Yoshifumi Yoshida
Chiba-shi, JAPAN
Attorneys & Agents of Record
Classification
USPC
257/347
H10D30/0323
H10D86/201
H10D30/6734
H10D30/6744
H10W20/021
Prosecution
- Examiner
- QUINTO, KEVIN V
- Art Unit
- 2826
- Docket No.
- S004-4324
- Confirmation No.
- 5820
Foreign Priority
2000-203404
·
2000-07-05
·
JAPAN
Publication
- Pub. No.
- US20020008262A1
- Pub. Date
- 2002-01-24
Patent Term Adjustment
-139days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2016-03-10
from
YOSHIDA, YOSHIFUMI
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-10-31
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Quick Facts
- Patent No.
- US 6,677,644
- App. No.
- 09/893,724
- Filed
- 2001-06-28
- Granted
- 2004-01-13
- Pub. No.
- US20020008262A1
- Examiner
- QUINTO, KEVIN V
- Art Unit
- 2826
- PTA
- -139 days
External Links