IP Library Granted Patent US 7,024,640
Granted Patent B2
US 7,024,640 · App. 09/897,817 · Granted Apr 4, 2006

Integrated circuit cell identification

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Quick Facts
Patent No.
US 7,024,640
App. No.
09/897,817
Granted
Apr 4, 2006
Kind
B2
Abstract

Apparatus, method and program product for evaluating design code of an integrated circuit. A program assigns an identifier to a cell based upon a cell characteristic. The program catalogs the identifier in a database configured to store and recall the identifier and characteristic along with additional properties that pertain to the cell. The program may associate the identifier or characteristic with a cell embedded in the design code.

Claims (14)

1. A method of processing integrated circuit design data, comprising:

a) reading information from a file;

b) determining whether an integrated circuit layout cell has been read;

c) if the determination of (b) is affirmative, determining whether the integrated circuit layout cell read from the file, is a known cell by comparing a set of cell characteristics contained within the integrated circuit layout cell to a plurality of sets of cell characteristics contained within a database, wherein each set of cell characteristics within the database is associated with a unique known cell;

d) if the determination of (c) is affirmative, a determining whether a designation of a cell characteristics has been made, wherein the designation of cell characteristics is suitable for identifying at least a particular cell;

e) if the determination of (d) is affirmative, determining if there is a match between at least a portion of the cell characteristics of the integrated circuit layout cell and the designated characteristics; and

f) if the determination of (e) is affirmative, providing an output indicative of the match.

2. The method of claim 1 , wherein the cell characteristics comprise at least one of the group consisting of a geometric shape, a checksum, a name, a timestamp, a library, a compiler, a copyright designator, a license fee designator, and a calendar.

3. The method of claim 2 , further comprising:

if the determination of (c) is negative, assigning an identifier to the integrated circuit layout cell; and recording the characteristics thereof in a database.

4. The method of claim 3 , further comprising:

repeating (a) through (f).

5. The method of claim 1 , further comprising:

if the determination of (e) is affirmative, replacing the integrated circuit layout cell with a replacement cell.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043951/0127 →
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0611 →