IP Library Granted Patent US 6,879,169
Granted Patent B2
US 6,879,169 · App. 09/904,663 · Granted Apr 12, 2005

Method for manufacturing and batch testing semiconductor devices

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,879,169
App. No.
09/904,663
Granted
Apr 12, 2005
Kind
B2
Abstract

A semiconductor device test apparatus according to the present invention includes a circuit board 103 and a film 105 . A plurality of electrodes 103 c are formed at the circuit board 103 at positions that face opposite a plurality of electrodes 201 a at a device to be measured 201 , whereas bumps 105 b are formed at the surface of the film 105 located toward the device to be measured 201 , at positions that face opposite the plurality of electrodes 201 a at the device to be measured 201 and electrodes 105 c are formed at the surface of the film 105 located toward the circuit board 103 at positions that face opposite the plurality of electrodes 103 c at the circuit board 103 . The bumps 105 b formed at one surface of the film 105 and the electrodes 105 c formed at another surface of the film 105 are electrically connected with each other via through holes 105 d to support semiconductor devices having electrodes provided at a fine pitch and to improve durability.

Claims (38)

1. A method for manufacturing semiconductor devices, the method comprising:

providing a semiconductor wafer with a front surface having a plurality of circuit elements formed thereon, wherein the semiconductor wafer has a back surface opposite to the front surface;

forming on the front surface a plurality of electrodes connected to the circuit elements;

inserting the wafer into a burn-in apparatus, wherein the semiconductor wafer is positioned in a positioning plate having a hole, the hole being formed in a shape conforming to an outer shape of the semiconductor wafer;

testing the circuit elements in the burn-in apparatus for electrical functions, through the electrodes, with the back surface of the wafer exposed to convective air in the burn-in apparatus; and

dividing the wafer into a plurality of semiconductor devices.

2. A method according to claim 1 , wherein said dividing includes dividing the wafer after said testing.

3. A method according to claim 2 , further comprising:

mounting the wafer on a circuit board with an elastic sheet interposed therebetween, including electrically connecting wiring circuits on the circuit board to the electrodes on the wafer through conductive elastic portions of the elastic sheet.

4. A method according to claim 3 , further comprising:

disposing over the back surface of the wafer a holding plate having a through hole;

pressing the wafer on the circuit board with the holding plate; and

providing the convective air over the back surface of the wafer through the through hole.

5. A method according to claim 2 , further comprising:

mounting the wafer on a circuit board with a film interposed therebetween, including electrically connecting wiring circuits on the circuit board to the electrodes on the wafer through bump electrodes in the film.

6. A method according to claim 5 , further comprising:

disposing over the back surface of the wafer a holding plate having a through hole;

pressing the wafer on the circuit board with the holding plate; and

providing the convective air over the back surface of the wafer through the through hole.

7. A method according to claim 1 , further comprising the step of forming a plurality of solder balls as the electrodes.

8. A method for manufacturing semiconductor devices, the method comprising:

preparing a semiconductor wafer with a first surface and a second surface, the second surface being opposite to the first surface, wherein the first surface has a plurality of circuit elements formed thereon;

forming a plurality of electrodes on the first surface, the electrodes being connected to the circuit elements;

inserting the semiconductor wafer into a burn-in apparatus, wherein the semiconductor wafer is positioned in a positioning plate having a hole, the hole being formed in a shape conforming to an outer shape of the semiconductor wafer;

testing the circuit elements in the burn-in apparatus for electrical function, through the electrodes, with the second surface of the semiconductor wafer exposed to convective air in the burn-in apparatus; and

dividing the semiconductor wafer into the plurality of semiconductor devices.

9. A method according to claim 8 , wherein the dividing includes dividing the semiconductor wafer after the testing.

10. A method according to claim 9 , further comprising mounting the semiconductor wafer on a circuit board with an elastic sheet interposed therebetween, including electrically connecting wiring circuits on the circuit board to the electrodes on the semiconductor wafer through conductive elastic portions of the elastic sheet.

11. A method according to claim 10 , further comprising:

disposing over the second surface of the semiconductor wafer a holding plate having a through hole;

pressing the semiconductor wafer on the circuit board with the holding plate; and

providing the convective air over the second surface of the semiconductor wafer through the through hole.

12. A method according to claim 9 , further comprising mounting the semiconductor wafer on a circuit board with a film interposed therebetween, including electrically connecting wiring circuits on the circuit board to the electrodes on the semiconductor wafer through bump electrodes in the film.

13. A method according to claim 12 , further comprising:

disposing over the second surface of the semiconductor wafer a holding plate having a through hole;

pressing the semiconductor wafer on the circuit board with the holding plate; and

providing the convective air over the second surface of the semiconductor wafer through the through hole.

14. A method according to claim 8 , further comprising forming a plurality of solder balls as the electrodes.