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App. No. 09/922,737 · Confirmation No. 7205

METHOD OF FORMING A MULTI-LAYERED WIRING STRUCTURE INCORPORATION IN SEMICONDUCTOR INTERGRATED CIRCUIT DEVICE AND HAVING LARGE ELECTROMIGRATION RESISTANCE.

Inventor: Yumi Saitoh
Abandoned -- Failure to Respond to an Office Action View Publication ↗
⬇ PDF
 Code Description Pages PDF
2001-08-07 TRNA Transmittal of New Application 2 View
2001-08-07 A.PE Preliminary Amendment 11 View
2001-08-07 SPEC Specification 16 View
2001-08-07 CLM Claims 3 View
2001-08-07 ABST Abstract 1 View
2001-08-07 DRW Drawings-only black and white line drawings 8 View
2001-08-07 OATH Oath or Declaration filed 3 View
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Quick Facts
App. No.
09/922,737
Filed
2001-08-07
Pub. No.
US20030205813A1
Art Unit
2822