A method of making a semiconductor structure includes determining a polish time which is sufficient to planarize a layer on a semiconductor substrate. The layer is polished for the polish time to planarize the layer, and then the layer is polished to a predetermined thickness. The semiconductor structures can be used to make a semiconductor device.
1. A method of making a semiconductor structure, comprising:
measuring a pattern density of a layer; followed by
calculating a first polish time, sufficient to planarize the layer on a semiconductor substrate;
polishing the layer for said first polish time, to planarize the layer; and
polishing the layer to a predetermined thickness.
2. The method of claim 1 , further comprising, prior to the calculating of said first polish time, measuring the thickness of the layer.
3. The method of claim 1 , further comprising, prior to the calculating of said first polish time, identifying a composition of the layer.
4. The method of claim 1 , further comprising determining a second polish time sufficient to reduce the thickness of the layer after planarization to the predetermined thickness;
wherein the polishing of the layer to the predetermined thickness comprises polishing the layer for said second polish time.
5. A process for making a plurality of semiconductor structures, comprising:
making each semiconductor structure by the method of claim 4 ;
wherein a Cpk of the process is at least 1.
6. The process of claim 5 , wherein the making of each semiconductor structure comprises, prior to the calculating of said first polish time, measuring the thickness of the layer, a pattern density of the layer, and identifying a composition of the layer.
7. A method of making a semiconductor device, comprising:
making a semiconductor structure by the method of claim 4 ; and
forming a semiconductor device from said structure.
8. A method of making an electronic device, comprising:
making a semiconductor device by the method of claim 7 , and
forming an electronic device, comprising said semiconductor device.
9. A process for making a plurality of semiconductor structures, comprising
making each semiconductor structure by the method of claim 1 ;
wherein a Cpk of the process is at least 1.
10. A method of making a semiconductor device, comprising:
making a semiconductor structure by the method of claim 1 ; and
forming a semiconductor device from said structure.
11. A method of making an electronic device, comprising:
making a semiconductor device by the method of claim 10 , and
forming an electronic device, comprising said semiconductor device.
12. In a method of making a semiconductor structure, including polishing a layer by chemical mechanical polishing, the improvement comprising measuring a pattern density of the layer; followed by calculating a first polish time sufficient to make the layer planar; determining a second polish time to reduce the thickness of the planar layer; and polishing for a third polish time equal to the sum of the first and second polish times.
13. A method of making a semiconductor structure, comprising:
measuring the pattern density of a layer on a semiconductor substrate and followed by polishing the layer with a system comprising:
a chemical mechanical polishing apparatus; and
machine readable medium, comprising code, imbedded in the machine readable medium, for calculating a first polish time, sufficient to planarize a layer on a semiconductor substrate.
14. A method of making a semiconductor device, comprising:
making a semiconductor structure by the method of claim 13 , and
forming a semiconductor device from said structure.
15. A method of making an electronic device, comprising:
making a semiconductor device by the method of claim 14 ; and
forming an electronic device, comprising said semiconductor device.