Granted Patent
Utility
US 6,493,282
· Confirmation No. 4484
SEMICONDUCTOR INTEGRATED CIRCUIT
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-09-06 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-09-06 | SPEC |
Specification | 36 | View | |
| 2001-09-06 | CLM |
Claims | 8 | View | |
| 2001-09-06 | ABST |
Abstract | 1 | View | |
| 2001-09-06 | DRW |
Drawings-only black and white line drawings | 8 | View | |
| 2001-09-06 | OATH |
Oath or Declaration filed | 5 | View |
Inventors
Masahisa Iida
Osaka, JAPAN
Kiyoto Oota
Osaka, JAPAN
Yuji Yamasaki
Osaka, JAPAN
Hakuhei Kawakami
Osaka, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/226
G11C7/10
G11C2207/104
Prosecution
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- Docket No.
- 60188-095
- Confirmation No.
- 4484
Foreign Priority
2000-270579
·
2000-09-06
·
JAPAN
Publication
- Pub. No.
- US20020027810A1
- Pub. Date
- 2002-03-07
Patent Term Adjustment
-56days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2020-05-27
CHANGE OF NAME
Recorded 2020-03-18
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-09-06
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Quick Facts
- Patent No.
- US 6,493,282
- App. No.
- 09/946,480
- Filed
- 2001-09-06
- Granted
- 2002-12-10
- Pub. No.
- US20020027810A1
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- PTA
- -56 days
External Links