IP Library Granted Patent US 7,003,585
Granted Patent B2
US 7,003,585 · App. 09/947,234 · Granted Feb 21, 2006

High speed serial interface

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Quick Facts
Patent No.
US 7,003,585
App. No.
09/947,234
Granted
Feb 21, 2006
Kind
B2
Abstract

A high speed, serial interface employs a simplified protocol which minimizes overhead enabling uncompressed image data to be sent serially over a long distance in real-time devices, such as a color printer. Because the error rate experienced in high speed serial and fiber optic links is very small and finite, the protocol removes the requirement to retransmit real time data. The protocol for initiator device-target device communications includes an idle message frame for indicating a device is ready for communication; a control word frame for sending a data request from the target device; a control word frame for indicating a transfer mode from the initiator device; and a data frame, wherein in response to a data request from the target device, the initiator device transmits a control word frame followed by the requested data.

Claims (30)

1. A high speed serial interface, comprising:

an initiator device for generating data and messages, wherein the initiator device includes a transceiver for sending and receiving data and messages using a serial protocol;

a target device for receiving data and messages, wherein the target device includes a transceiver for sending and receiving data and messages using the serial protocol; and

a transmission media for coupling the initiator device and the target device;

wherein the serial protocol comprises a plurality of time frames comprising an idle message time frame for indicating a device is ready for communication, wherein each of the initiator device and the target device transmits an idle frame when it is ready for communication; a target control word frame for sending a data request from the target device; an initiator control word frame for indicating a transfer mode from the initiator device; and a data frame, wherein in response to a target control word frame containing a data request from the target device, the initiator device transmits an initiator control word frame followed by the requested data;

wherein the initiator device comprises a digital front end (DFE), the target device comprises a printer and the transmission media comprises fiber optics; and

wherein the printer control word frame further comprises a verification bit, a mode bit, a page request bit, a line request bit, a buffer status bit and a reset status bit.

2. The high speed serial interface of claim 1 , wherein the DFE control word frame further comprises a verification bit, separation bits, a reset bit and a mode bit.

3. The high speed serial interface of claim 1 , wherein an idle frame is sent by the printer while a serial link between the printer and the DFE is operational if neither a valid control word frame nor data is requested from the DFE.

4. The high speed serial interface of claim 1 , wherein the serial protocol further comprises a reset sequence for changing mode comprising an idle frame, a DFE control word frame and an idle frame from the DFE.

5. A protocol structure for high-speed, serial digital front end (DFE)-printer communications, comprising:

a plurality of time frames comprising an idle message time frame for indicating a device is ready for communication, wherein each of the DFE and the printer transmits an idle frame when it is ready for communication;

a printer control word frame for sending a page request and a line request from the printer;

a DFE control word frame for indicating a transfer mode from the DFE; and

a data frame, wherein in response to a page request from the printer, the DFE transmits a control word frame followed by the requested data;

wherein the printer control word frame further comprises a verification bit, a mode bit, a page request bit, a line request bit, a buffer status bit and a reset status bit.

6. The protocol structure of claim 5 , wherein the DFE control word frame comprises a verification bit, separation bits, a reset bit and a mode bit.

7. The protocol structure of claim 6 , wherein the mode bit indicates a normal mode of operation and a diagnostic mode of operation.

8. The protocol structure of claim 7 , wherein normal mode means transmission of data from the DFE to the printer.

9. The protocol structure of claim 5 , wherein an idle frame is sent by the printer while a serial link between the printer and the DFE is operational if neither a valid control word frame nor data is requested from the DFE.

10. The protocol structure of claim 5 , further comprising a reset sequence for changing mode comprising an idle frame, a DFE control word frame and an idle frame from the DFE.

11. A method of transmitting data between an initiator device and a target device using a high speed, serial interface, comprising:

transmitting, from the initiator device, an idle message frame indicating the initiator device is ready for transmission;

transmitting, from the target device, an idle message frame indicating the target device is ready for communication;

transmitting, from the target device, a target control word frame requesting transmission of data from the initiator device;

transmitting, from the initiator device in response to a target control word frame containing the data request from the target device, an initiator control word frame indicating a data transfer mode and the requested data;

wherein the initiator device comprises a digital front end (DFE) and the target device comprises a printer; and

wherein the printer control word frame further comprises a verification bit, a mode bit, a page request bit, a line request bit, a buffer status bit and a reset status bit.

12. The method of claim 11 wherein the DFE control word frame further comprises a verification bit, separation bits, a reset bit and a mode bit.

13. The method of claim 11 , wherein an idle frame is sent by the printer while the serial link is operational if neither a valid control word frame nor data is requested from the DFE.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Sep 7, 2022
From: JPMORGAN CHASE BANK, N.A. AS SUCCESSOR-IN-INTEREST ADMINISTRATIVE AGENT AND COLLATERAL AGENT TO BANK ONE, N.A.
To: XEROX CORPORATION
Reel/Frame 061388/0388 →
RELEASE OF SECURITY INTEREST Recorded Sep 7, 2022
From: JPMORGAN CHASE BANK, N.A. AS SUCCESSOR-IN-INTEREST ADMINISTRATIVE AGENT AND COLLATERAL AGENT TO JPMORGAN CHASE BANK
To: XEROX CORPORATION
Reel/Frame 066728/0193 →
SECURITY AGREEMENT Recorded Oct 31, 2003
From: XEROX CORPORATION
To: JPMORGAN CHASE BANK, AS COLLATERAL AGENT
Reel/Frame 015134/0476 →
SECURITY AGREEMENT Recorded Jul 30, 2002
From: XEROX CORPORATION
To: BANK ONE, NA, AS ADMINISTRATIVE AGENT
Reel/Frame 013111/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2002
From: PHONG, SAN A.; WILLIAMS, KENT A.; KUO, YUANTA; YEW, THOMAS H.C.
To: XEROX CORPORATION
Reel/Frame 012586/0272 →