IP Library Granted Patent US 6,873,335
Granted Patent B2
US 6,873,335 · App. 09/947,947 · Granted Mar 29, 2005

Graphics memory system for volumeric displays

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Quick Facts
Patent No.
US 6,873,335
App. No.
09/947,947
Granted
Mar 29, 2005
Kind
B2
Abstract

A graphics memory system for managing image data for a volumetric display that displays volumetric images, the system including a first buffer memory with a first predefined address space for holding image data for a three-dimensional image; a second buffer memory with as second predefined address space for holding image data for a three-dimensional image, wherein the first and second predefined address spaces are the same; and a voxel router in communication with both the first and second buffer memories, wherein the voxel router is configured to use a selectable one of the first and second buffer memories as an active memory out of which stored image data is to be read for display on the volumetric display and to use the other of the first and second buffer memories as an inactive memory into which image data is to be written.

Claims (23)

1. A graphics memory system for a volumetric display that displays volumetric images, said system comprising:

a first buffer memory for holding data for a three-dimensional image;

a second buffer memory for holding data for a three-dimensional image;

a voxel router in communication with both the first and second buffer memories, said voxel router being configured to use a selectable one of said first and second buffer memories as an active memory out of which stored image data is to be read for display on the volumetric display and to use the other of said first and second buffer memories as an inactive memory into which image data is to be written; and

an address generator in communication with the voxel router and the first and second buffer memories, said address generator during operation generating addresses identifying locations within the predefined address spaces of the first and second buffer memories and being configured to respond to receiving a write block command by causing the voxel router to write new data to a 32-bit block within the inactive memory at a location that is identified by an address supplied by the address generator;

wherein the address generator is further configured to respond to receiving said write block command by causing the voxel router to retrieve data that is stored in the identified block of inactive memory, to modify the retrieved data, and to write the modified data back to said inactive memory as said new data.

2. The graphics memory system of claim 1 wherein the voxel router is further configured to modify the retrieved data by using a designated logical operation to combine the retrieved data with data supplied with the write word command.

3. The graphics memory system of claim 1 wherein the voxel router supports AND, OR and XOR logical operations, and wherein said designated logical operation is one of the supported logical operations.

4. A graphics memory system for managing image data for a volumetric display that displays volumetric images, said system comprising:

a first buffer memory for holding data for a three-dimensional image;

a second buffer memory for holding data for a three-dimensional image;

a voxel router in communication with both the first and second buffer memories, said voxel router being configured to use a selectable one of said first and second buffer memories as an active memory out of which stored image data is to be read for display on the volumetric display and to use the other of said first and second buffer memories as an inactive memory into which image data is to be written; and

an address generator in communication with the voxel router and the first and second buffer memories, said address generator during operation generating addresses identifying locations within the predefined address spaces of the first and second buffer memories and being configured to respond to receiving a write block command by causing the voxel router to write new data to a block within the inactive memory at a location that is identified by an address supplied by the address generator,

wherein the address generator is further configured to respond to receiving a swap command by causing the voxel router to select which of said first and second buffer memories is to be the active memory.

5. The graphics memory system of claim 4 wherein the swap command designates a copy and the address generator is further configured to respond to receiving the swap command by causing the voxel router to copy contents of the active buffer to the inactive buffer.

6. A graphics memory system for managing image data for a volumetric display that displays volumetric images, said system comprising:

a first buffer memory for holding data for a three-dimensional image;

a second buffer memory for holding data for a three-dimensional image;

a voxel router in communication with both the first and second buffer memories, said voxel router being configured to use a selectable one of said first and second buffer memories as an active memory out of which stored image data is to be read for display on the volumetric display and to use the other of said first and second buffer memories as an inactive memory into which image data is to be written; and

an address generator in communication with the voxel router and the first and second buffer memories, said address generator during operation generating addresses identifying locations within the predefined address spaces of the first and second buffer memories and being configured to respond to receiving a write voxel command by causing the voxel router to retrieve a block of data from the inactive memory, said block of data containing a value for a voxel that is identified by the write voxel command, to modify the retrieved block by modifying the value for the identified voxel within that retrieved block, and to write the modified block back to said inactive memory.

7. The graphics memory system of claim 6 wherein said block is a 32-bit word.

8. The graphics memory system of claim 7 wherein the voxel router is further configured to modify the retrieved data by using a designated logical operation to modify the one voxel designated by the write voxel command in the retrieved data word while preserving the remaining voxels in the retrieved data word.

9. The graphics memory system of claim 8 wherein the voxel router supports AND, OR and XOR logical operations on the one designated voxel, and wherein said designated logical operation is one the supported logical operations.

Assignments (5)
MERGER Recorded Sep 28, 2015
From: PARELLEL CONSULTING LIMITED LIABILITY COMPANY
To: GULA CONSULTING LIMITED LIABILITY COMPANY
Reel/Frame 036668/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2011
From: ELLIS AMALGAMATED LLC
To: PARELLEL CONSULTING LIMITED LIABILITY COMPANY
Reel/Frame 027225/0540 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2011
From: ACTUALITY SYSTEMS, INC.
To: ELLIS AMALGAMATED LLC, D/B/A OPTICS FOR HIRE
Reel/Frame 026988/0531 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2009
From: ACTUALITY SYSTEMS, INC.
To: ELLIS AMALGAMATED LLC, D/B/A OPTICS FOR HIRE
Reel/Frame 023699/0963 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2002
From: HALL, DEIRDRE M.
To: ACTUALITY SYSTEMS, INC.
Reel/Frame 012521/0596 →