IP Library Granted Patent US 7,002,962
Granted Patent B2
US 7,002,962 · App. 09/950,949 · Granted Feb 21, 2006

Method, processor and system of providing ATM unidirectional path switched ring functionality

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Quick Facts
Patent No.
US 7,002,962
App. No.
09/950,949
Granted
Feb 21, 2006
Kind
B2
Abstract

ATM path switched ring switching is based on a ring segment BIP. An ATM VP ring segment is defined as originating at an ATM VP ring input and terminating at an ATM VP ring output. A ring segment BIP is composed of the path BIP error counts of multiple SONET/SDH paths from the ring segment input to the ring segment output.

Claims (20)

1. Selection method for selecting a path in an asynchronous transfer mode (ATM) switched ring, comprising the steps of:

defining ring segments as different ring paths originating at a same ATM virtual path (VP) ring input and terminating at a same ATM VP ring output node wherein a ring segment includes all ring nodes from the ring input to the ring output node;

determining a preferred ring segment according to a criterion that is independent of cell traffic rate; and

group switching all virtual paths which transit this selected ring segment.

2. The method of claim 1 , wherein said step of determining comprises:

computing a running average of a sum of path bit interleaved parity (BIP) error counts for each ring segment originating at said same ATM VP ring input and terminating at said same ATM VP ring output; and

comparing at said ATM VP ring output said path BIP error counts for each ring segment and selecting a ring segment based on a lowest path BIP error count for the selected ring segment.

3. A processor for use in a network element ( 12 , 14 , 16 , 18 ) in an asynchronous transfer mode (ATM) unidirectional path switched ring, comprising:

a first direction ring segment bit interleaved parity (BIP) processor, responsive to an incoming ring segment operation and maintenance (OAM) cell having a segment BIP error count transported therein in said first direction, for providing said segment BIP error count to an adder for summation with a running average path BIP error count, said adder for providing an updated segment BIP error count for transport on an outgoing ring segment OAM cell in said first direction; and

a second direction ring segment bit interleaved parity (BIP) processor, responsive to an incoming ring segment OAM cell having a segment BIP error count transported therein in said second direction, for providing said segment BIP error count to an adder for summation with a running average path BIP error count, said adder for providing an updated segment BIP error count for transport on an outgoing ring segment OAM cell in said second direction.

4. A system comprising a plurality of network elements interconnected by a pair of ATM unidirectional path switched rings, each network element including first and second processors as claimed in claim 3 .

5. Selection method for selecting a path in an asynchronous transfer mode (ATM) unidirectional path switched ring, comprising the steps of:

defining the ring segments as different ring paths originating at a same ATM virtual path (VP) ring input node and terminating at a same ATM VP ring output node wherein a ring segment includes all ring nodes from the ring input node to the ring output node;

determining a preferred ring segment according to a selected criterion; and

at said same ATM VP ring output, group switching all virtual paths which transit this selected ring segment.

6. The method of claim 5 , wherein said step of determining comprises:

computing a running average of a sum of path bit interleaved parity (BIP) error counts for each ring segment originating at said same ATM VP ring input and terminating at said same ATM VP ring output; and

comparing at said ATM VP ring output said path BIP error counts for each ring segment and selecting a ring segment based on a lowest path BIP error count for the selected ring segment.

7. A system comprising a plurality of network elements interconnected by an asynchronous transfer mode (ATM) path switched ring, each network element having a processor for carrying out the method of claim 5 .

8. A system comprising a plurality of network elements interconnected by an asynchronous transfer mode (ATM) path switched ring, each network element having a processor for carrying out the method of claim 6 .

Assignments (2)
CHANGE OF NAME Recorded Sep 25, 2019
From: ALCATEL
To: ALCATEL LUCENT
Reel/Frame 050493/0434 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2014
From: ALCATEL LUCENT
To: SOUND VIEW INNOVATIONS, LLC
Reel/Frame 032086/0016 →