Methods, systems and computer program products for synchronizing clocks of nodes on a computer network
View Patent ↗Methods, systems and computer program products are provided for synchronizing clocks in a computer network. A first node clock is synchronized to a second node clock by establishing an initial value of a virtual second node clock at the first node. The initial value may be established based on the first node clock and a timing record received from the second node. A frequency bias adjustment factor is determined for the virtual second node clock based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node spaced apart in time. The responses from the second node include the timing record based on the second node clock. A time of the virtual second node clock is provided based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between requests.
1. A method for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network comprising:
establishing an initial value of a virtual second node clock at the first node based on the first node clock and a timing record received from the second node based on a second node clock responsive to a clock request from the first node to the second node;
determining a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, ones of the responses from the second node including a timing record based on the second node clock; and
providing a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests.
2. The method according to claim 1 further comprising establishing an updated initial value of the virtual second node clock based on one of the plurality of corresponding responses from the second node.
3. The method according to claim 1 , wherein establishing a virtual second node clock comprises:
determining a one way delay between the first node and the second node based on a time of transmission of the clock request from the first node and a time of receipt of the corresponding response from the second node at the first node.
4. The method according to claim 3 , wherein determining a one way delay further comprises:
determining the difference between the time of receipt and the time of transmission to provide a round trip delay; and
determining the one way delay as half the round trip delay.
5. The method according to claim 1 further comprising:
establishing an updated initial value of a virtual second node clock at the first node based on the first node clock and a timing record from one of the plurality of corresponding responses from the second node based on a second node clock responsive to a clock request from the first node to the second node;
determining a jitter based on a comparison of the updated initial value of the virtual second node clock and a calculated value of the virtual second node clock based on the initial value of the virtual second node clock; and
determining a skew rate for the second node clock based on the determined jitter.
6. The method of claim 5 further comprising
determining if the skew rate satisfies an acceptance criteria;
entering a long polling mode having an associated resynchronization period if the skew rate satisfies the acceptance criteria; and
entering a short polling mode having an associated resynchronization period if the skew rate does not satisfy the acceptance criteria, wherein the resynchronization period of the long polling mode is longer than the resynchronization period of the short polling mode.
7. The method of claim 6 , wherein entering long polling mode includes using the skew rate as a phase adjustment.
8. The method of claim 6 wherein the resynchronization period of the long polling mode is greater than about twenty minutes and wherein the resynchronization period of the short polling mode is less than about five minutes.
9. The method of claim 6 further comprising adaptively determining the resynchronization period of the long polling mode based on the jitter.
10. The method of claim 9 further comprising:
determining if the jitter is greater than a first criterion;
shortening the resynchronization period of the long polling mode if the jitter is greater than the first criterion;
determining if the jitter is less than a second criterion;
extending the resynchronization period of the long polling mode if the jitter is less than the second criterion; and
maintaining the resynchronization period of the long polling mode if the jitter is not greater than the first criterion or less than the second criterion.
11. The method of claim 6 further comprising adaptively determining the resynchronization period of the short polling mode based on the jitter.
12. The method of claim 11 further comprising:
determining if the jitter is greater than a first criterion;
shortening the resynchronization period of the short polling mode if the jitter is greater than the first criterion;
determining if the jitter is less than a second criterion;
extending the resynchronization period of the short polling mode if the jitter is less than the second criterion; and
maintaining the resynchronization period of the short polling mode if the jitter is not greater than the first criterion or less than the second criterion.
13. A method for synchronizing clocks at a plurality of nodes of a network comprising:
maintaining a virtual second node clock at a first of the nodes based on a clock of the first of the nodes and a timing record received from a second of the nodes based on a clock of the second of the nodes; and
maintaining a virtual third node clock at the first of the nodes based on the clock of the first of the nodes and a timing record received from a third of the nodes based on a clock of the third of the nodes.
14. The method of claim 13 wherein maintaining a virtual second node clock comprises updating the virtual second node clock based on subsequent timing records received from the second of the nodes to provide an updated virtual second node clock; and
wherein maintaining a virtual third node clock comprises updating the virtual third node clock based on subsequent timing records received from the third of the nodes to provide an updated virtual third node clock.
15. The method of claim 14 , further comprising
determining a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the second of the nodes;
providing a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests;
determining a frequency bias adjustment factor for the virtual third node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the third of the nodes; and
providing a time of the virtual third node clock based on the frequency bias adjustment factor responsive to requests for the virtual third node clock at a time between ones of the plurality of clock requests.
16. The method of claim 15 , further comprising:
determining a jitter for the virtual second node clock based on a comparison of the updated virtual second node clock and a calculated value of the virtual second node clock;
determining a skew rate for the second node clock based on the determined jitter;
determining a value for the virtual second node clock based on the determined frequency bias and the determined skew rate;
determining a jitter for the virtual third node clock based on a comparison of the updated virtual third node clock and a calculated value of the virtual third node clock;
determining a skew rate for the virtual third node clock based on the determined jitter; and
determining a value for the virtual third node clock based on the determined frequency bias and the determined skew rate.
17. A method for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node comprising:
generating a one way delay based on transmission times of the plurality of clock requests from the first node and a plurality of reception times of the plurality of corresponding responses from the second node; and
establishing a virtual clock at the first node of the computer network based on the generated one way delay.
18. The method according to claim 17 wherein generating a one way delay further comprises:
determining the difference between ones of the transmission times of the plurality of clock requests from the first node to the second node and ones of the reception times of the plurality of corresponding responses at the first node to provide a plurality of first node differences;
determining the difference between a plurality of reception times of the plurality of clock requests at the second node a plurality of transmission times of the plurality of corresponding responses from the second node to the first node to provide and a plurality of second node differences;
determining the difference between ones of the first node differences and the second node differences to provide a plurality of round trip delays;
averaging the plurality of round trip delays to provide an average round trip delay; and
determining the one way delay as half the average round trip delay.
19. A system for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network, the system comprising:
a virtual clock circuit that establishes an initial value of a virtual second node clock at the first node based on the first node clock and a timing record received from the second node based on a second node clock responsive to a clock request from the first node to the second node;
a frequency bias circuit that determines a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, ones of the responses from the second node including a timing record based on the second node clock; and
a provider circuit that provides a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests.
20. The system of claim 19 wherein the virtual clock circuit is further configured to establish an updated initial value of the virtual second node clock based on ones of the plurality of corresponding responses from the second node.
21. The system of claim 19 , wherein the virtual clock is further configured to:
determine a one way delay between the first node and the second node based on a time of transmission of the clock request from the first node and a time of receipt of the corresponding response from the second node at the first node.
22. The system of claim 21 , wherein the virtual clock circuit is further configured to:
determine the difference between the time of receipt and the time of transmission to provide a round trip delay; and
determine the one way delay as half the round trip delay.
23. The system of claim 19 wherein the virtual clock circuit further comprises:
a jitter calculation circuit that is configured to establish an updated initial value of a virtual second node clock at the first node based on the first node clock and a timing record from one of the plurality of corresponding responses from the second node based on a second node clock responsive to a clock request from the first node to the second node and determine a jitter based on a comparison of the updated initial value of the virtual second node clock and a calculated value of the virtual second node clock based on the initial value of the virtual second node clock; and
a skew calculation circuit that is configured to determine a skew rate for the second node clock based on the determined jitter.
24. The system of claim 23 wherein the virtual clock circuit further comprises:
a clock adjustment circuit that determines if the skew rate satisfies an acceptance criteria and is configured to:
enter a long polling mode having an associated resynchronization period if the skew rate satisfies the acceptance criteria; and
enter a short polling mode having an associated resynchronization period if the skew rate does not satisfy the acceptance criteria, wherein the resynchronization period of the long polling mode is longer than the resynchronization period of the short polling mode.
25. The system of claim 24 , wherein the clock adjustment circuit is further configured to use the skew rate as a phase adjustment if long polling mode is entered.
26. The system of claim 24 wherein the resynchronization period of the long polling mode is greater than twenty minutes and wherein the resynchronization period of the short polling mode is less than five minutes.
27. The system of claim 24 wherein the virtual clock circuit is further configured to adaptively determine the resynchronization period of the long polling mode based on the jitter.
28. The system of claim 27 wherein the virtual clock circuit is further configured to:
determine if the jitter is greater than a first criterion;
shorten the resynchronization period of the long polling mode if the jitter is greater than the first criterion;
determine if the jitter is less than a second criterion;
extend the resynchronization period of the long polling mode if the jitter is less than the second criterion; and
maintain the resynchronization period of the long polling mode if the jitter is not greater than the first criterion or less than the second criterion.
29. The system of claim 24 wherein the virtual clock circuit is further configured to adaptively determine the resynchronization period of the short polling mode based on the jitter.
30. The system of claim 29 wherein the virtual clock circuit is further configured to:
determine if the jitter is greater than a first criterion;
shorten the resynchronization period of the short polling mode if the jitter is greater than the first criterion;
determine if the jitter is less than a second criterion;
extend the resynchronization period of the short polling mode if the jitter is less than the second criterion; and
maintain the resynchronization period of the short polling mode if the jitter is not greater than the first criterion or less than the second criterion.
31. A system for synchronizing clocks at a plurality of nodes of a network, the system comprising:
a clock synchronization module that maintains a virtual second node clock at a first of the nodes based on a clock of the first of the nodes and timing records received from a second of the nodes based on a clock of the second of the nodes and maintains a virtual third node clock at the first of the nodes based on the clock of the first of the nodes and timing records received from a third of the nodes based on a clock of the third of the nodes.
32. The system of claim 31 wherein the clock synchronization module further comprises a virtual clock circuit that is configured to update the virtual second node clock based on subsequent timing records received from the second of the nodes to provide an updated virtual second node clock and to update the virtual third node clock based on subsequent timing records received from the third of the nodes to provide an updated virtual third node clock.
33. The system of claim 32 , wherein the clock synchronization module further comprises:
a frequency bias circuit that is configured to determine a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the second of the nodes and to determine a frequency bias adjustment factor for the virtual third node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the third of the nodes; and
a provider circuit that is configured to provide a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests and to provide a time of the virtual third node clock based on the frequency bias adjustment factor responsive to requests for the virtual third node clock at a time between ones of the plurality of clock requests.
34. The system of claim 33 , wherein the virtual clock circuit further comprises:
a jitter calculation circuit that is configured to determine a jitter for the virtual second node clock based on a comparison of the updated virtual second node clock and a calculated value of the virtual second node clock and to determine a jitter for the virtual third node clock based on a comparison of the updated virtual third node clock and a calculated value of the virtual third node clock;
a skew calculation circuit that is configured to determine a skew rate for the second node clock based on the determined jitter and to determine a skew rate for the virtual third node clock based on the determined jitter; and
a clock adjust circuit configured to determine a value for the virtual second node clock based on the determined frequency bias and the determined skew rate and to determine a value for the virtual third node clock based on the determined frequency bias and the determined skew rate.
35. A system for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, the system comprising:
a virtual clock circuit that generates a one way delay based on transmission times of the plurality of clock requests from the first node and a plurality of reception time of the plurality of corresponding responses from the second node and establishes a virtual clock at the first node of the computer network based on the generated one way delay.
36. The system claim 35 wherein the virtual clock circuit is further configured to:
determine the difference between ones of the reception times of the plurality of corresponding responses at the first node and ones of the transmission times of the plurality of clock requests from the first node to the second node to provide a plurality of first node differences;
determine the difference between a plurality of transmission times of the plurality of corresponding responses from the second node to the first node and a plurality of reception times of the plurality of clock requests at the second node to provide a plurality of second node differences; and
determine the difference between ones of the first node differences and the second node differences to provide a plurality of round trip delays;
average the plurality of round trip delays to provide an average round trip delay; and
determine the one way delay as half the average round trip delay.
37. A system for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network, the system comprising:
means for establishing an initial value of a virtual second node clock at the first node based on the first node clock and a timing record received from the second node based on a second node clock responsive to a clock request from the first node to the second node;
means for determining a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, ones of the responses from the second node including a timing record based on the second node clock; and
means for providing a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests.
38. The system of claim 37 further comprising means for establishing an updated initial value of the virtual second node clock based on one of the plurality of corresponding responses from the second node.
39. The system of claim 37 , wherein the means for establishing a virtual second node clock comprises:
means for determining a one way delay between the first node and the second node based on a time of transmission of the clock request from the first node and a time of receipt of the corresponding response from the second node at the first node.
40. The system of claim 39 , wherein the means for determining a one way delay further comprises:
means for determining the difference between the time of receipt and the time of transmission to provide a round trip delay; and
means for determining the one way delay as half the round trip delay.
41. The system of claim 37 further comprising:
means for establishing an updated initial value of a virtual second node clock at the first node based on the first node clock and a timing record from one of the plurality of corresponding responses from the second node based on a second node clock responsive to a clock request from the first node to the second node;
means for determining a jitter based on a comparison of the updated initial value of the virtual second node clock and a calculated value of the virtual second node clock based on the initial value of the virtual second node clock; and
means for determining a skew rate for the second node clock based on the determined jitter.
42. The system of claim 41 further comprising
means for determining if the skew rate satisfies an acceptance criteria;
means for entering a long polling mode having an associated resynchronization period if the skew rate satisfies the acceptance criteria; and
means for entering a short polling mode having an associated resynchronization period if the skew rate does not satisfy the acceptance criteria, wherein the resynchronization period of the long polling mode is longer than the resynchronization period of the short polling mode.
43. The system of claim 42 , wherein means for entering long polling mode includes means for using the skew rate as a phase adjustment.
44. The system of claim 42 further comprising means for adaptively determining the resynchronization period of the long polling mode based on the jitter.
45. The system of claim 44 further comprising:
means for determining if the jitter is greater than a first criterion;
means for shortening the resynchronization period of the long polling mode if the jitter is greater than the first criterion;
means for determining if the jitter is less than a second criterion;
means for extending the resynchronization period of the long polling mode if the jitter is less than the second criterion; and
means for maintaining the resynchronization period of the long polling mode if the jitter is not greater than the first criterion or less than the second criterion.
46. The system of claim 42 further comprising means for adaptively determining the resynchronization period of the short polling mode based on the jitter.
47. The system of claim 46 further comprising:
means for determining if the jitter is greater than a first criterion;
means for shortening the resynchronization period of the short polling mode if the jitter is greater than the first criterion;
means for determining if the jitter is less than a second criterion;
means for extending the resynchronization period of the short polling mode if the jitter is less than the second criterion; and
means for maintaining the resynchronization period of the short polling mode if the jitter is not greater than the first criterion or less than the second criterion.
48. A system for synchronizing clocks at a plurality of nodes of a network, the system comprising:
means for maintaining a virtual second node clock at a first of the nodes based on a clock of the first of the nodes and a timing record received from a second of the nodes based on a clock of the second of the nodes; and
means for maintaining a virtual third node clock at the first of the nodes based on the clock of the first of the nodes and a timing record received from a third of the nodes based on a clock of the third of the nodes.
49. The system of claim 48 wherein means for maintaining a virtual second node clock comprises means for updating the virtual second node clock based on subsequent timing records received from the second of the nodes to provide an updated virtual second node clock; and
wherein means for maintaining a virtual third node clock comprises means for updating the virtual third node clock based on subsequent timing records received from the third of the nodes to provide an updated virtual third node clock.
50. The system of claim 49 , further comprising
means for determining a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the second of the nodes;
means for providing a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests;
means for determining a frequency bias adjustment factor for the virtual third node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the third of the nodes; and
means for providing a time of the virtual third node clock based on the frequency bias adjustment factor responsive to requests for the virtual third node clock at a time between ones of the plurality of clock requests.
51. The system of claim 50 , further comprising:
means for determining a jitter for the virtual second node clock based on a comparison of the updated virtual second node clock and a calculated value of the virtual second node clock;
means for determining a skew rate for the second node clock based on the determined jitter;
means for determining a value for the virtual second node clock based on the determined frequency bias and the determined skew rate;
means for determining a jitter for the virtual third node clock based on a comparison of the updated virtual third node clock and a calculated value of the virtual third node clock;
means for determining a skew rate for the virtual third node clock based on the determined jitter; and
means for determining a value for the virtual third node clock based on the determined frequency bias and the determined skew rate.
52. A system for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, the system comprising:
means for generating a one way delay based on transmission times of the plurality of clock requests from the first node and a plurality of reception times of the plurality of corresponding responses from the second node; and
means for establishing a virtual clock at the first node of the computer network based on the generated one way delay.
53. The system of claim 52 wherein generating a one way delay further comprises:
means for determining the difference between ones of the transmission times of the plurality of clock requests from the first node to the second node and ones of the reception times of the plurality of corresponding responses at the first node to provide a plurality of first node differences;
means for determining the difference between a plurality of reception times of the plurality of clock requests at the second node a plurality of transmission time of the plurality of corresponding responses from the second node to the first node to provide and a plurality of second node differences;
means for determining the difference between ones of the first node differences and the second node differences to provide a plurality of round trip delays;
means for averaging the plurality of round trip delays to provide an average round trip delay; and
means for determining the one way delay as half the average round trip delay.
54. A computer program product for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network, the computer program product comprising:
a computer-readable storage medium having computer-readable program code embodied in said medium, said computer-readable program code comprising:
computer readable program code which establishes an initial value of a virtual second node clock at the first node based on the first node clock and a timing record received from the second node based on a second node clock responsive to a clock request from the first node to the second node;
computer readable program code which determines a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, ones of the responses from the second node including a timing record based on the second node clock; and
computer readable program code which provides a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests.
55. The computer program product of claim 54 further comprising computer readable code which establishes an updated initial value of the virtual second node clock based on one of the plurality of corresponding responses from the second node.
56. The computer program product of claim 54 , wherein the computer readable code which establishes a virtual second node clock comprises:
computer readable code which determines a one way delay between the first node and the second node based on a time of transmission of the clock request from the first node and a time of receipt of the corresponding response from the second node at the first node.
57. The computer program product of claim 56 , wherein the computer readable code which determines a one way delay further comprises:
computer readable code which determines the difference between the time of receipt and the time of transmission to provide a round trip delay; and
computer readable program code which determines the one way delay as half the round trip delay.
58. The computer program product of claim 54 further comprising:
computer readable program code which establishes an updated initial value of a virtual second node clock at the first node based on the first node clock and a timing record from one of the plurality of corresponding responses from the second node based on a second node clock responsive to a clock request from the first node to the second node;
computer readable program code which determines a jitter based on a comparison of the updated initial value of the virtual second node clock and a calculated value of the virtual second node clock based on the initial value of the virtual second node clock; and
computer readable program code which determines a skew rate for the second node clock based on the determined jitter.
59. The computer program product of claim 58 further comprising
computer readable program code which determines if the skew rate satisfies an acceptance criteria;
computer readable program code which enters a long polling mode having an associated resynchronization period if the skew rate satisfies the acceptance criteria; and
computer readable program code which enters a short polling mode having an associated resynchronization period if the skew rate does not satisfy the acceptance criteria, wherein the resynchronization period of the long polling mode is longer than the resynchronization period of the short polling mode.
60. The computer program product of claim 59 , wherein the computer readable code which enters long polling mode includes computer readable program code for using the skew rate as a phase adjustment.
61. The computer program product of claim 59 further comprising
computer readable program code for adaptively determining the resynchronization period of the long polling mode based on the jitter.
62. The computer program product of claim 61 further comprising:
computer readable program code which determines if the jitter is greater than a first criterion;
computer readable program code that shortens the resynchronization period of the long polling mode if the jitter is greater than the first criterion;
computer readable program code which determines if the jitter is less than a second criterion;
computer readable program code which extends the resynchronization period of the long polling mode if the jitter is less than the second criterion; and
computer readable program code which maintains the resynchronization period of the long polling mode if the jitter is not greater than the first criterion or less than the second criterion.
63. The computer program product of claim 59 further comprising
computer readable program code which adaptively determines the resynchronization period of the short polling mode based on the jitter.
64. The computer program product of claim 63 further comprising:
computer readable program code which determines if the jitter is greater than a first criterion;
computer readable program code which shortens the resynchronization period of the short polling mode if the jitter is greater than the first criterion;
computer readable program code which determines if the jitter is less than a second criterion;
computer readable program code which extends the resynchronization period of the short polling mode if the jitter is less than the second criterion; and
computer readable program code which maintains the resynchronization period of the short polling mode if the jitter is not greater than the first criterion or less than the second criterion.
65. A computer program product for synchronizing clocks at a plurality of nodes of a network, the computer program product comprising:
a computer-readable storage medium having computer-readable program code embodied in said medium, said computer-readable program code comprising:
computer-readable program code which maintains a virtual second node clock at a first of the nodes based on a clock of the first of the nodes and a timing record received from a second of the nodes based on a clock of the second of the nodes; and
computer-readable program code which maintains a virtual third node clock at the first of the nodes based on the clock of the first of the nodes and a timing record received from a third of the nodes based on a clock of the third of the nodes.
66. The computer program product of claim 65 wherein computer readable program code which maintains a virtual second node clock comprises computer readable program code which updates the virtual second node clock based on subsequent timing records received from the second of the nodes to provide an updated virtual second node clock; and
wherein computer readable program code which maintains a virtual third node clock comprises computer readable program code which updates the virtual third node clock based on subsequent timing records received from the third of the nodes to provide an updated virtual third node clock.
67. The computer program product of claim 66 , further comprising
computer readable program code which determines a frequency bias adjustment factor for the virtual second node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the second of the nodes;
computer readable program code which provides a time of the virtual second node clock based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between ones of the plurality of clock requests;
computer readable program code which determines a frequency bias adjustment factor for the virtual third node clock based on time spaced ones of a plurality of clock requests from the first of the nodes and a plurality of corresponding responses from the third of the nodes; and
computer readable program code which provides a time of the virtual third node clock based on the frequency bias adjustment factor responsive to requests for the virtual third node clock at a time between ones of the plurality of clock requests.
68. The computer program product of claim 67 , further comprising:
computer readable program code which determines a jitter for the virtual second node clock based on a comparison of the updated virtual second node clock and a calculated value of the virtual second node clock;
computer readable program code which determines a skew rate for the second node clock based on the determined jitter;
computer readable program code which determines a value for the virtual second node clock based on the determined frequency bias and the determined skew rate;
computer readable program code which determines a jitter for the virtual third node clock based on a comparison of the updated virtual third node clock and a calculated value of the virtual third node clock;
computer readable program code which determines a skew rate for the virtual third node clock based on the determined jitter; and
computer readable program code which determines a value for the virtual third node clock based on the determined frequency bias and the determined skew rate.
69. A computer program product for synchronizing a first node clock at a first node of a computer network and a second node clock at a second node of the computer network based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node, the computer program product comprising:
a computer-readable storage medium having computer-readable program code embodied in said medium, said computer-readable program code comprising:
computer readable program code which generates a one way delay based on transmission times of the plurality of clock requests from the first node and a plurality of reception times of the plurality of corresponding responses from the second node; and
computer readable program code which establishes a virtual clock at the first node of the computer network based on the generated one way delay.
70. The computer program product of claim 69 wherein computer readable program code which generates a one way delay further comprises:
computer readable program code which determines the difference between ones of the transmission times of the plurality of clock requests from the first node to the second node and ones of the reception times of the plurality of corresponding responses at the first node to provide a plurality of first node differences;
computer readable program code which determines the difference between a plurality of reception times of the plurality of clock requests at the second node a plurality of transmission times of the plurality of corresponding responses from the second node to the first node to provide and a plurality of second node differences;
computer readable program code which determines the difference between ones of the first node differences and the second node differences to provide a plurality of round trip delays;
computer readable program code which averages the plurality of round trip delays to provide an average round trip delay; and
computer readable program code which determines the one way delay as half the average round trip delay.