Liquid crystal display with multi-frame inverting function and an apparatus and a method for driving the same

1. A liquid crystal display (LCD) having a multi-frame inversion function, comprising:

a timing controller having a multiframe inversion driving portion for modulating a reversal (REV) signal that designates a polarity of a data voltage for switching the polarity of liquid crystals on an LCD panel with respect to a common electrode voltage, thereby generating a modulated REV signal;

a gate driver for generating a gate driving voltage;

a data driver for generating a data driving voltage based on the modulated REV signal received from the timing controller; and

an LCD panel having a plurality of gate lines, a plurality of data lines, a plurality of switching elements each formed in an area surrounded by the gate lines and the data lines and connected to the gate lines and the data lines, and a plurality of dot electrodes connected to the switching elements and operated in response to the switching elements,

wherein inversion drive repeats in a period of p frames based on the gate driving voltage and the data driving voltage, and the inversion is performed by shifting down by every line in a period of one as the frame changes, and

a plurality of REV signals have sequential 1/p phase differences.

2. The LCD as claimed in claim 1 , wherein the multiframe inversion driving portion comprises:

a counter for generating a switching signal based on a vertical sync signal indicating a period of a screen;

an REV generator for generating first through p th REV signals based on the vertical sync signal and a gate clock signal; and

a multiplexer for multiplexing the first through p th REV signals based on the switching signal to output a modulated REV signal to the data driver.

3. The LCD as claimed in claim 2 , wherein the REV generator comprises:

a first negative polarity trigger for generating a first trigger signal based on the vertical sync signal and a CPV signal;

a first positive polarity trigger for generating a first REV signal and a third REV signal based on the vertical sync signal and the first trigger signal; and

a second negative polarity trigger for generating a second REV signal and a fourth REV signal based on the first trigger signal, the first REV signal and the vertical sync signal.

4. The LCD as claimed in claim 3 , wherein the trigger is a D flip-flop.

5. The LCD as claimed in claim 2 , wherein the counter is a 2-bit counter.

6. The LCD as claimed in claim 1 , wherein p is an integer equal to or greater than 4.

7. A liquid crystal display (LCD) having a multi-frame inversion function, comprising:

a timing controller having a multiframe inversion driving portion for separating REV signals that designate a polarity of a data voltage supplied to an LCD panel, individually by every odd/even column, and generating a modulated odd REV signal and a modulated even REV signal designating the polarities of odd data voltage and even data voltage, respectively;

a gate driver for generating a gate driving voltage;

a data driver for generating a data driving voltage based on the modulated odd REV signal and the modulated even REV signal received from the timing controller; and

an LCD panel having a plurality of gate lines, a plurality of data lines, a plurality of switching elements each formed in an area surrounded by the gate lines and the data lines and connected to the gate lines and the data lines, and a plurality of dot electrodes connected to the switching elements and operating in response to the switching elements,

wherein inversion drive repeats in a period of p frames based on the gate driving voltage and the data driving voltage, and the inversion is performed by shifting down by every line in a period of q frames as the frame changes, wherein q is less than p, and

the REV siqnals have sequential 1/p phase differences.

8. The LCD as claimed in claim 7 , wherein the multiframe inversion driving portion comprises:

a counter for generating a switching signal based on a vertical sync signal indicating the period of a screen;

an REV generator for generating first through p th REV signals based on the vertical sync signal and a gate clock signal;

a first multiplexer for multiplexing the first through p th REV signals based on the switching signal to output a modulated odd REV signal to the data driver; and

a second multiplexer for multiplexing the first through p th REV signals based on the switching signal to output a modulated even REV signal to the data driver.

9. The LCD as claimed in claim 8 , wherein the REV generator comprises:

a first negative polarity trigger for generating a first trigger signal based on the vertical sync signal and a CPV signal;

a first positive polarity trigger for generating a first REV signal and a third REV signal based on the vertical sync signal and the first trigger signal; and

a second negative polarity trigger for generating a second REV signal and a fourth REV signal based on the first trigger signal, the first REV signal and the vertical sync signal.

10. The LCD as claimed in claim 8 , wherein the counter is a 2-bit counter.

11. The LCD as claimed in claim 9 , wherein the trigger is a D flipflop.

12. The LCD as claimed in claim 7 , wherein p is an integer equal to or greater than 4.

13. An apparatus for driving a liquid crystal display (LCD) having a multi-frame inversion function, which includes a plurality of pixels arranged in a matrix form having a plurality of gate lines, a plurality of data lines insulated from the gate lines and intersecting the gate lines, and a plurality of switching elements each formed in an area surrounded by the gate lines and the data lines and connected to the gate lines and the data lines, the apparatus comprising:

a timing controller having a multiframe inversion driving portion for modulating an REV signal that designates a polarity of a data voltage for switching the polarity of liquid crystals on an LCD panel of the LCD with respect to a common electrode voltage, thereby generating a modulated REV signal;

a gate driver for generating a gate driving voltage; and

a data driver for generating a data driving voltage based on the modulated REV signal received from the timing controller,

wherein the multiframe inversion driving portion comprises:

a counter for generating a switching signal based on a vertical sync signal indicating the period of a screen;

an REV generator for generating first through p th REV signals based on the vertical sync signal and a gate clock signal; and

a multiplexer for multiplexing the first throuah p th REV signals based on the switching signal to output a modulated REV signal to the data driver,

wherein the first through p th REV signals have seguential 1/p phase differences.

14. The apparatus as claimed in claim 13 , wherein p is an integer equal to or greater than 4.

15. The apparatus as claimed in claim 13 , wherein the counter is a 2-bit counter.

16. The apparatus as claimed in claim 13 , wherein the REV generator comprises:

a first negative polarity trigger for generating a first trigger signal based on the vertical sync signal and a CPV signal;

a first positive polarity trigger for generating a first REV signal and a third REV signal based on the vertical sync signal and the first trigger signal; and

a second negative polarity trigger for generating a second REV signal and a fourth REV signal based on the first trigger signal, the first REV signal and the vertical sync signal.

17. The apparatus as claimed in claim 16 , wherein the trigger is a D flip-flop.

18. An apparatus for driving a liquid crystal display (LCD) having a multiframe inversion function, which includes a plurality of pixels arranged in a matrix form having a plurality of gate lines, a plurality of data lines insulated from the gate lines and intersecting the gate lines, and a plurality of switching elements each formed in an area surrounded by the gate lines and the data lines and connected to the gate lines and the data lines, the apparatus comprising:

a timing controller having a multiframe inversion driving portion for modulating a REV signal that designates a polarity of a data voltage supplied to an LCD panel of the LCD, individually every odd/even column, and generating a modulated odd REV signal and a modulated even REV signal designating the polarities of odd data voltage and even data voltage, respectively;

a gate driver for generating a gate driving voltage; and

a data driver for generating a data driving voltage based on the modulated odd REV signal and the modulated even REV signal received from the timing controller,

wherein the multiframe inversion driving portion comprises:

a counter for generating a switching signal based on a vertical sync signal indicating the period of a screen;

an REV generator for generating first throuah p th REV signals based on the vertical sync signal and a gate clock signal;

a first multiplexer for multiplexing the first through p th REV signals based on the switching signal to output a modulated odd REV signal to the data driver; and

a second multiplexer for multiplexing the first through p th REV signals based on the switching signal to output a modulated even REV signal to the data driver,

wherein the first through p th REV signals have seguential 1/p phase differences.

19. The apparatus as claimed in claim 18 , wherein the counter is a 2-bit counter.

20. The apparatus as claimed in claim 18 , wherein p is an integer equal to or greater than 4.

21. The apparatus as claimed in claim 18 , wherein the REV generator comprises:

a first negative polarity trigger for generating a first trigger signal based on the vertical sync signal and a CPV signal;

a first positive polarity trigger for generating a first REV signal and a third REV signal based on the vertical sync signal and the first trigger signal; and

a second negative polarity trigger for generating a second REV signal and a fourth REV signal based on the first trigger signal, the first REV signal and the vertical sync signal.

22. The apparatus as claimed in claim 21 , wherein the trigger is a D flip-flop.

23. A method for driving a liquid crystal disDlav (LCD) having a multiframe inversion function, which includes a plurality of pixels arranged in a matrix form having a plurality of gate lines, a plurality of data lines insulated from gate lines and intersecting the gate lines, and a plurality of switching elements each formed in an area surrounded by the gate lines and the data lines and connected to the gate lines and the data lines, the method comprising the steps of:

(a) sequentially providing a scanning signal to the gate lines;

(b) modulating an REV signal that designates a polarity of a data voltage for switching the polarity of liquid crystals on an LCD panel of the LCD with respect to a common electrode voltage, thereby generating a modulated REV signal;

(c) generating a data driving voltage based on the modulated REV signal; and

(d) supplying the data driving voltage to the data lines,

wherein a plurality of REV signals have sequential 1/p phase differences.

24. The method as claimed in claim 23 , wherein the step (b) further comprises the steps of:

(b-1) generating a switching signal;

(b-2) generating at least one REV signal based on a frame-discriminating vertical sync signal and a gate clock signal; and

(b-3) multiplexing the at least one REV signal based on the switching signal and outputting the same.

25. The method as claimed in claim 24 , wherein the step (b-2) further comprises the steps of:

(b-21) generating a first trigger signal based on the frame-discriminating vertical sync signal and the gate clock signal;

(b-22) generating a first REV signal a third REV signal based on the gate clock signal and the first trigger signal, the first REV signal being opposite to the third REV signal in polarity; and

(b-23) generating a second REV signal and a fourth REV signal based on the gate clock signal, the first REV signal and the first trigger signal, the second REV signal being opposite to the fourth REV signal in polarity.

26. A method for driving a liquid crystal displav (LCD) having a multiframe inversion function, which includes a plurality of pixels arranged in a matrix form having a plurality of gate lines, a plurality of data lines insulated from and intersecting the gate lines, and a plurality of switching elements each formed in an area surrounded by the gate line and the data line and connected to the gate line and the data line, the method comprising the steps of:

(a) sequentially supplying a scanning signal to the gate lines;

(b) modulating an REV signal that designates a polarity of a data voltage supplied to an LCD panel of the LCD, individually every odd/even column, thereby generating a modulated odd REV signal and a modulated even REV signal designating the polarities of odd data voltage and even data voltage, respectively;

(c) generating a data driving voltage based on the modulated REV signal; and

(d) supplying the data driving voltage to the data lines,

wherein a plurality of REV signals have sequential 1/p phase differences.

27. The method as claimed in claim 26 , wherein the step (b) comprises the steps of:

(b-1) generating a switching signal;

(b-2) generating at least one REV signal based on a frame-discriminating vertical sync signal and a gate clock signal;

(b-3) first multiplexing at least one REV signal based on the switching signal to generate an odd REV signal; and

(b-4) second multiplexing at least one REV signal based on the switching signal to generate an even REV signal.

28. The method as claimed in claim 27 , wherein the first multiplexing step includes generating an odd REV signal designating the polarity of the odd data voltage individually separating the LCD panel by every odd column.

29. The method as claimed in claim 27 , wherein the second multiplexing step includes generating an even REV signal designating the polarity of the even data voltage individually separating the LCD panel by every even column.