Granted Patent
Utility
US 6,600,683
· Confirmation No. 5385
SEMICONDUCTOR INTEGRATED CIRCUIT
Inventor:
Ichiro Yamane
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-09-17 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-09-17 | SPEC |
Specification | 21 | View | |
| 2001-09-17 | CLM |
Claims | 6 | View | |
| 2001-09-17 | ABST |
Abstract | 1 | View | |
| 2001-09-17 | DRW |
Drawings-only black and white line drawings | 5 | View | |
| 2001-09-17 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Ichiro Yamane
Kyoto, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/195
Prosecution
- Examiner
- LE, VU ANH
- Art Unit
- 2824
- Docket No.
- 56937-031
- Confirmation No.
- 5385
Foreign Priority
P2001-15555
·
2001-01-24
·
JAPAN
Publication
- Pub. No.
- US20020097612A1
- Pub. Date
- 2002-07-25
Patent Term Adjustment
0days
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2014-05-26
CHANGE OF NAME
Recorded 2014-01-08
from
YAMANE, ICHIRO
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-09-17
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Quick Facts
- Patent No.
- US 6,600,683
- App. No.
- 09/953,555
- Filed
- 2001-09-17
- Granted
- 2003-07-29
- Pub. No.
- US20020097612A1
- Examiner
- LE, VU ANH
- Art Unit
- 2824
- PTA
- 0 days
External Links