Liquid crystal display device and the fabricating method thereof comprising pixel electrode completely covering adjacent gate line and adjacent channel region unconnected to the pixel electrode
View Patent ↗An array substrate of a liquid crystal display device includes a substrate, a plurality of gate lines disposed on the substrate, a plurality of data lines disposed perpendicular to the gate lines, a plurality of storage capacitors each having at least a first electrode disposed parallel to a corresponding gate line, a plurality of switching devices each electrically connected with the corresponding gate line and a corresponding data line, and a plurality of pixel electrodes each overlapping a portion of an n th storage capacitor and a portion of a (n−1) th storage capacitor.
1. An array substrate of a liquid crystal display device, comprising:
a substrate;
a plurality of gate lines disposed on the substrate;
a plurality of data lines disposed perpendicular to the gate lines;
a plurality of storage capacitors each having at least a first electrode disposed parallel to a corresponding gate line and a second electrode extending into the substrate;
a plurality of switching devices each including an active layer having a channel region and each electrically connected with the corresponding gate line and the corresponding data line; and
a plurality of pixel electrodes each overlapping at least said channel region, a portion of an n th storage capacitor and a portion of a (n−1) th storage capacitor,
wherein an n th one of the pixel electrodes completely covers an (n−1) th adjacent gate line and the channel region of an (n−1) th adjacent one of the switching devices connected to the (n−1) th adjacent gate line, and the n th one of the pixel electrodes is unconnected to the (n−1) th adjacent one of the switching devices.
2. The array substrate according to claim 1 , wherein the active layer is formed of polysilicon.
3. The array substrate according to claim 2 , wherein each of the at least first electrodes of the plurality of storage capacitors are made of a same material as the gate line.
4. The array substrate according to claim 3 , wherein the second electrode of each of the plurality of storage capacitors is made of a same material as the active layer.
5. The array substrate according to claim 1 , wherein each of the plurality of switching devices includes an active layer made of amorphous silicon.
6. The arrays substrate according to claim 5 , wherein the first electrode of the plurality of storage capacitors is made of a same material as the corresponding gate line.
7. The array substrate according to claim 6 , wherein a second electrode of each of the plurality of storage capacitors is made of a same material as a corresponding data line.
8. A method of fabricating an array substrate for a liquid crystal display device, comprising the steps of:
forming a first insulating layer on a substrate;
forming a polysilicon layer on the first insulating layer;
sequentially forming a second insulating layer and a first metal layer on the polysilicon layer;
patterning both the second insulating layer and the first metal layer to form a gate line, a gate electrode, and a capacitor electrode, the patterned second insulating layer being underneath the patterned metal layer;
doping portions of the polysilicon layer;
forming a third insulating layer to cover the first metal layer and the doped portions of the polysilicon layer, the third insulating layer including contact holes exposing the doped portions of the polysilicon layer;
forming a second metal layer on the third insulating layer, the second metal layer including at least a data line and a connecting electrode each electrically contacting the doped portions of the polysilicon layer via the contact holes;
forming a fourth insulating layer to cover the second metal layer, wherein a portion of the connecting electrode is through the fourth insulating layer; and
forming a pixel electrode on the fourth insulating layer, the pixel electrode electrically contacting the connecting electrode, an end portion of the pixel electrode overlapping a portion of the capacitor electrode;
wherein the connecting electrode contacts the doped portions of the polysilicon layer at opposite sides of the capacitor electrodes, and the pixel electrode is separate from an adjacent pixel electrode by a gap disposed above the capacitor electrode, and the pixel electrode completely covers an adjacent gate line and a channel region of an adjacent switching device connected to the adjacent gate line such that the pixel electrode is unconnected to the adjacent switching device.
9. The method according to claim 8 , wherein the pixel electrode contacts the connecting electrode over the capacitor electrode.
10. An array substrate of a liquid crystal display device, comprising:
a substrate;
a plurality of gate lines disposed on the substrate;
a plurality of data lines disposed perpendicular to the gate lines;
a plurality of storage capacitors each having at least a first electrode disposed parallel to a corresponding gate line and a second electrode disposed parallel to a corresponding data line;
a plurality of switching devices each including an active layer having a channel region and each electrically connected with the corresponding gate line and a corresponding data line; and
a plurality of pixel electrodes each overlapping at least said channel region and each directly contacting the second electrode of one of the plurality of storage capacitors,
wherein the second electrode includes first and second portions each disposed at opposing surfaces of the first electrode parallel to the substrate, and
wherein an n th one of the pixel electrodes completely covers an (n−1) th adjacent gate line and the channel region of an (n−1) th adjacent one of the switching devices connected to the (n−1) th adjacent gate line, and the n th one of the pixel electrodes is unconnected to the (n−1) th adjacent one of the switching devices.
11. The array substrate according to claim 10 , wherein the active layer is formed of polysilicon.
12. The array substrate according to claim 10 , wherein each of the at least first electrodes of the plurality of storage capacitors are made of a same material as the gate line.
13. The array substrate according to claim 10 , wherein a second electrode of each of the plurality of storage capacitors is made of a same material as the active layer.
14. The array substrate according to claim 10 , wherein each of the plurality of switching devices includes an active layer made of amorphous silicon.
15. The arrays substrate according to claim 10 , wherein the first electrode of the plurality of storage capacitors is made of a same material as the corresponding gate line.
16. The array substrate according to claim 10 , wherein a second electrode of each of the plurality of storage capacitors is made of a same material as a corresponding data line.
17. The array substrate according to claim 10 , wherein the first and second portions of the second electrode are electrically interconnected at a plurality of locations.
18. The array substrate according to claim 17 , wherein one of the first and second portions of the second electrode is disposed parallel to the substrate.
19. The array substrate according to claim 10 , further comprising a connecting electrode overlapping at least one of the first and second electrodes of the plurality of storage capacitors.