Synchronization signal detector and method of detection of synchronization signal
View Patent ↗The invention is a method and demodulator which detects periodic synchronization signals. The method of the invention includes multiplexing orthogonal signals in a wireless transmission into a signal stream; applying the signal stream to a synchronization signal detector which produces an output signal including detection of a unique code representing the synchronization signals within the signal stream; demultiplexing the output signal into orthogonal signals; calculating a function of the demultiplexed orthogonal signals and combining the function of each of the orthogonal signals into a combined output signal; averaging the combined output signal over a time period during which the synchronization signals repeat to produce an averaged signal; detecting peaks in the averaged signal; and synchronizing a demodulator in response to the peaks which demodulates the wireless transmission.
1. A method of detecting synchronization signals comprising:
multiplexing orthogonal signals in a wireless transmission into a signal stream;
applying the signal stream to a synchronization signal detector of a demodulator which produces an output signal including detection of a unique code representing the synchronization signals within the signal stream;
demultiplexing the output signal into orthogonal signals;
calculating a function of each of the demultiplexed orthogonal signals and combining the function of each of the demultiplexed orthogonal signals into a combined output signal;
averaging the combined output signal over a time period during which the synchronization signals repeat to produce an averaged signal;
detecting peaks in the averaged signal; and
synchronizing the demodulator in response to the peaks which demodulates the wireless transmission.
2. A method in accordance with claim 1 wherein the detecting of the peaks in the averaged signal comprises:
threshold detecting the averaged signal to produce the peaks when the averaged signal exceeds a threshold.
3. A method in accordance with claim 2 wherein:
the wireless transmission is modulated as a direct sequence spread spectrum transmission.
4. A method in accordance with claim 3 further comprising:
processing the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
5. A method in accordance with claim 4 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
6. A method in accordance with claim 3 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
7. A method in accordance with claim 2 further comprising:
processing the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
8. A method in accordance with claim 7 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
9. A method in accordance with claim 2 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
10. A method in accordance with claim 2 wherein:
the synchronization signal detector comprises delays which are implemented in a circular buffer.
11. A method in accordance with claim 1 wherein:
the wireless transmission is modulated as a direct sequence spread spectrum transmission.
12. A method in accordance with claim 11 further comprising:
processing the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
13. A method in accordance with claim 12 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
14. A method in accordance with claim 11 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and the averaged signal is an average of a number of chips equal to a product of n and m chips.
15. A method in accordance with claim 11 wherein:
the synchronization signal detector comprises delays which are implemented in a circular buffer.
16. A method in accordance with claim 1 further comprising:
processing the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
17. A method in accordance with claim 16 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and the averaged signal is an average of a number of chips equal to a product of n and m chips.
18. A method in accordance with claim 16 wherein:
the synchronization signal detector comprises delays which are implemented in a circular buffer.
19. A method in accordance with claim 1 wherein:
the wireless transmission is on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and the averaged signal is an average of a number of chips equal to a product of n and m chips.
20. A method in accordance with claim 19 wherein:
the synchronization signal detector comprises delays which are implemented in a circular buffer.
21. A method in accordance with claim 1 wherein:
the synchronization signal detector comprises connected delays which are implemented in a circular buffer.
22. A demodulator which detects synchronization signals comprising:
a multiplexer which is responsive to orthogonal signals to multiplex the orthogonal signals into a signal stream;
a synchronization signal detector, responsive to the signal stream from the multiplexer, which produces an output signal including detection of a unique code representing the synchronization signals within the signal stream;
a demultiplexer, which is responsive to the output signal from the synchronization signal detector, which demultiplexes the output signal into an output signal containing the orthogonal signals;
a signal processor, responsive to the orthogonal signals outputted by the demultiplexer, which calculates a function of each of the orthogonal signals and combines the function of each of the orthogonal signals into a combined output signal;
an averaging unit which averages the combined output signal over a time period during which the synchronization signals repeat to produce an averaged signal;
a detector, responsive to the averaged signal, which detects peaks in the averaged signal; and
a processor, responsive to the peaks, which produces a signal used for synchronizing the demodulator.
23. A demodulator in accordance with claim 22 wherein:
the detector, responsive to the averaged signal, comprises a threshold detector.
24. A demodulator in accordance with claim 23 further comprising:
a control unit which processes the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
25. A demodulator in accordance with claim 24 wherein:
a wireless transmission is provided on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and the averaged signal is an average of a number of chips equal to a product of n and m chips.
26. A demodulator in accordance with claim 25 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
27. A demodulator in accordance with claim 24 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
28. A demodulator in accordance with claim 23 wherein:
a wireless transmission is provided on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and the averaged signal is an average of a number of chips equal to a product of n and m chips.
29. A demodulator in accordance with claim 28 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
30. A demodulator in accordance with claim 23 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a random access memory.
31. A demodulator in accordance with claim 22 further comprising:
a control unit which processes the peaks to remove auto/cross correlation products therein which do not represent the synchronization signals.
32. A demodulator in accordance with claim 31 wherein:
a wireless transmission is provided on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
33. A demodulator in accordance with claim 32 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
34. A demodulator in accordance with claim 31 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
35. A demodulator in accordance with claim 22 wherein:
a wireless transmission is provided on a synchronization channel with the synchronization signals repeating once as a symbol within n repeating symbols with n−1 symbols therein being data and n is an integer;
the multiplexed orthogonal signals are pairs of I and Q signals with each pair of I and Q signals being transmitted as a symbol;
each I and Q signal being m chips long and m is an integer; and
the averaged signal is an average of a number of chips equal to a product of n and m chips.
36. A demodulator in accordance with claim 35 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a circular buffer.
37. A demodulator in accordance with claim 22 wherein:
the synchronization signal detector detects the unique code and comprises delays which are implemented in a random access memory.