Granted Patent
Utility
US 6,414,365
· Confirmation No. 8153
THIN-LAYER SILICON-ON-INSULATOR (SOI) HIGH-VOLTAGE DEVICE STRUCTURE
Patented Case
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-10-01 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-10-01 | SPEC |
Specification | 15 | View | |
| 2001-10-01 | CLM |
Claims | 5 | View | |
| 2001-10-01 | ABST |
Abstract | 1 | View | |
| 2001-10-01 | DRW |
Drawings-only black and white line drawings | 5 | View | |
| 2001-10-01 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Ted Letavic
Putnam Valley, NY
Mark Simpson
White Plains, NY
Attorneys & Agents of Record
Classification
USPC
257/409
Prosecution
- Examiner
- WILSON, ALLAN R
- Art Unit
- 2815
- Customer No.
- 24737
- Docket No.
- US 010468
- Confirmation No.
- 8153
Patent Term Adjustment
-120days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2017-09-22
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2006-12-15
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-10-01
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Quick Facts
- Patent No.
- US 6,414,365
- App. No.
- 09/968,121
- Filed
- 2001-10-01
- Granted
- 2002-07-02
- Examiner
- WILSON, ALLAN R
- Art Unit
- 2815
- PTA
- -120 days
External Links