IP Library Granted Patent US 6,906,382
Granted Patent B2
US 6,906,382 · App. 09/968,940 · Granted Jun 14, 2005

Semiconductor device and method of fabricating the same

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Quick Facts
Patent No.
US 6,906,382
App. No.
09/968,940
Granted
Jun 14, 2005
Kind
B2
Abstract

A gate electrode is formed on a semiconductor substrate with a gate insulating film interposed therebetween, and a sidewall spacer is then formed at the lateral sides of the gate electrode on the semiconductor substrate. Epitaxial growth is conducted at a lower growth rate to form, at both lateral sides of the sidewall spacer on the semiconductor substrate, first semiconductor layers made of first single-crystal silicon films superior in crystallinity. Then, epitaxial growth is conducted at a higher growth rate to form, on the first semiconductor layers, second semiconductor layers made of single-crystal films or polycrystalline films, which are inferior in crystallinity, or amorphous films. The upper areas of the first semiconductor layers and the whole areas of the second semiconductor layers are doped with impurity, thus forming impurity diffusion layers respectively serving as a source and a drain.

Claims (44)

1. A semiconductor device comprising:

an element separating area formed on a semiconductor substrate of a first conductivity type;

a gate electrode formed on an inner region surrounded by said element separating area on said semiconductor substrate, and having a gate insulating film interposed therebetween;

a sidewall spacer formed only on both lateral sides of said gate electrode, and the sidewall spacer is composed of an insulating film;

a pair of laminates formed respectively on said semiconductor substrate at both lateral sides of said gate electrode with being in contact with said sidewall spacer, each of said laminates including a lower first semiconductor layer made of silicon and an upper second semiconductor layer mainly made of silicon; and

first impurity layers of a second conductivity type, respectively serving as a source or a drain, and respectively formed as extending over both upper areas of said first semiconductor layers and the entire areas of said second semiconductor layers,

wherein said first semiconductor layers being made of single-crystal silicon film relatively superior in crystallinity, in that the first semiconductor layers contain substantially no crystal defects, within said inner region, and

wherein said second semiconductor layers being made of single-crystal films or polycrystalline films, which are relatively inferior in crystallinity, in that the single-crystal or polvcrystalline films of the second semiconductor layers contain crystal defects, or being made of amorphous films.

2. A semiconductor device according to claim 1 , wherein said second semiconductor layers contain germanium.

3. A semiconductor device according to claim 1 , wherein lower areas of said first semiconductor layers are composed of second impurity layers of the first conductivity type, and pn-junctions are formed in the inner portion of said first semiconductor layers.

4. A semiconductor device according to claim 1 , wherein lower areas of said first semiconductor layers are composed of third impurity layers of the second conductivity type, and of which impurity-concentrations are lower than that of said first impurity layers.

5. A semiconductor device according to claim 4 , further comprising fourth impurity layers of the second conductivity type and of which impurity-concentrations are lower than that of said first impurity layers,

said fourth impurity layers being formed in the areas of said semiconductor substrate which come in contact with said first semiconductor layers.

6. A semiconductor device according to claim 2 , wherein lower areas of said first semiconductor layers are composed of second impurity layers of the first conductivity type, and a pn-junctions are formed in the inner portion of said first semiconductor layers.

7. A semiconductor device according to claim 1 , wherein said first semiconductor layers and said second semiconductor layers are mutually connected via a flat contact surface.

8. A semiconductor device according to claim 1 further comprises, a silicide layer formed on said second semiconductor layer.

9. A semiconductor device according to claim 8 further comprises, an interlayer insulating film formed over said suicide layer, and

a metal electrode formed through said interlayer insulating film and connected to said suicide layer.

10. A semiconductor device according to claim 1 further comprises a trench-type element separation area formed in said semiconductor substrate.

11. A semiconductor device according to claim 1 further comprises,

an interlayer insulating film formed over said gate electrode and said second semiconductor layer, and

a metal electrode formed through said interlayer insulating film and electrically connected to said second semiconductor layer.

12. A semiconductor device comprising:

an element separating area formed on a semiconductor substrate of a first conductivity type;

a gate electrode formed on an inner region surrounded by said element separating area on said semiconductor substrate, and having a gate insulating film interposed therebetween;

a sidewall spacer formed only on both lateral sides of said gate electrode, and the sidewall spacer is composed of an insulating film;

a pair of laminates formed respectively on said semiconductor substrate at both lateral sides of said gate electrode with being in contact with said sidewall spacer, each of said laminates including a lower first semiconductor layer made of silicon and an upper second semiconductor layer mainly made of silicon; and

first impurity layers of a second conductivity type, respectively serving as a source or a drain, and respectively formed as extending over both the upper areas of said first semiconductor layers and the entire areas of said second semiconductor layers,

wherein said first semiconductor layers being composed of single-crystal silicon film are formed by conducting an epitaxial growth within said inner region at a low rate directly on an entire exposed area at which no said gate electrode and no said sidewall spacer exists such that the first semiconductor layers are relatively superior in crystallinity in that the first semiconductor layers contain substantially no crystal defects, and

wherein said second semiconductor layers being composed of single-crystal films or polycrystalline films, which are relatively inferior in crystallinity in that the single-crystal or polycrystalline films of the second semiconductor layers contain crystal defects, or being composed of amorphous films.

13. A semiconductor device according to claim 12 , wherein said second semiconductor layers contain germanium.

14. A semiconductor device according to claim 12 , wherein lower areas of said first semiconductor layers are composed of second impurity layers of the first conductivity type, and pn-junctions are formed in the inner portion of said first semiconductor layers.

15. A semiconductor device according to claim 12 , wherein lower areas of said first semiconductor layers are composed of third impurity layers of the second conductivity type, and of which impurity-concentrations are lower than that of said first impurity layers.

16. A semiconductor device according to claim 15 , further comprising fourth impurity layers of the second conductivity type and of which impurity-concentrations are lower than that of said first impurity layers,

said fourth impurity layers being formed in the areas of said semiconductor substrate which come in contact with said first semiconductor layers.

17. A semiconductor device according to claim 13 , wherein lower areas of said first semiconductor layers are composed of second impurity layers of the first conductivity type, and a pn-junctions are formed in the inner portion of said first semiconductor layers.

18. A semiconductor device according to claim 12 , wherein said first semiconductor layers and said second semiconductor layers are mutually connected via a flat contact surface.

19. A semiconductor device according to claim 12 further comprises, a silicide layer formed on said second semiconductor layer.

20. A semiconductor device according to claim 19 further comprises, an interlayer insulating film formed over said silicide layer, and

a metal electrode formed through said interlayer insulating film and connected to said silicide layer.

21. A semiconductor device according to claim 12 further comprises a trench-type element separation area formed in said semiconductor substrate.

22. A semiconductor device according to claim 12 further comprises,

an interlayer insulating film formed over said gate electrode and said second semiconductor layer, and

a metal electrode formed through said interlayer insulating film and electrically connected to said second semiconductor layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2014
From: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 032152/0514 →