IP Library Granted Patent US 6,725,343
Granted Patent Utility
US 6,725,343 · Confirmation No. 4194

SYSTEM AND METHOD FOR GENERATING CACHE COHERENCE DIRECTORY ENTRIES AND ERROR CORRECTION CODES IN A MULTIPROCESSOR SYSTEM

⬇ PDF
Code Description Pages PDF
2004-02-02 IFEE Issue Fee Payment (PTO-85B) 2 View
2001-10-05 TRNA Transmittal of New Application 1 View
2001-10-05 SPEC Specification 45 View
2001-10-05 CLM Claims 15 View
2001-10-05 ABST Abstract 1 View
2001-10-05 DRW Drawings-only black and white line drawings 11 View
2001-10-05 OATH Oath or Declaration filed 2 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
Patent No.
US 6,725,343
App. No.
09/972,477
Filed
2001-10-05
Granted
2004-04-20
Pub. No.
US20020124143A1
Art Unit
2188
PTA
-48 days