Use of a U-groove as an alternative to using a V-groove for protection against dicing induced damage in silicon
View Patent ↗The present disclosure relates that by modifying chip die dicing methodology to a U-groove profile from a V-groove profile by modifying the second etch step to be a dry etch instead of a wet etch results in a direct cost savings by eliminating a more expensive process step, as well as the need for stripping the developed photoresist layer. Furthermore, going to a U-groove profile accomplishes additional indirect and greater cost savings resulting from increased process throughput, improved yield, and reduced metal layer defects.
1. A method for dicing die from a semiconductor wafer while allowing a very close cut of a die edge relative to active elements on the die without damaging the active elements comprising:
etching by way of a first dry etch an opening down to the surface of the semiconductor wafer;
etching by way of a second dry etch a U-groove in the opening down to the surface of the semiconductor wafer created by the first dry etch; and
sawing the semiconductor wafer along the U-groove where one edge of the saw is substantially in alignment with the bottom of the U-groove.
2. The method of claim 1 wherein the first dry etch comprises SF6 as the main active gas component.
3. The method of claim 1 wherein the second dry etch uses a combination of gases comprising SF6 and O2.
4. The method of claim 1 wherein the opening at the surface is 3.5 to 5.5 microns wide.
5. The method of claim 1 wherein the U-groove is approximately 4 microns in depth.
6. The method of claim 1 wherein the U-groove is approximately 3.5 to 5.5 microns in depth.
7. The method of claim 1 wherein the U-groove is approximately 6 to 10 microns in width.
8. The method of claim 1 wherein the semiconductor wafer is comprised of amorphous silicon.
9. The method of claim 1 wherein the semiconductor wafer is comprised of a III-V compound.
10. The method of claim 1 wherein the semiconductor wafer is comprised of gallium arsenide.
11. The method of claim 1 wherein the semiconductor wafer is comprised of silicon on insulator.
12. A method of fabricating high resolution image sensor dies from a wafer so that the dies have precision faces to enable the dies to be assembled with other like dies to form a larger array without image loss or distortion at the points where the dies are assembled together, comprising the steps of:
etching by way of a first dry etch an opening down to the surface of the semiconductor wafer;
etching by way of a second dry etch small U-shaped grooves in the opening down to the surface of the semiconductor wafer created by the first dry etch;
forming grooves in the opposite side of the wafer opposite each of the U-shaped grooves, the axis of the grooves being parallel to the axis of the U-shaped groove opposite thereto; and
sawing the wafer along the U-shaped grooves with one side of the cut made by sawing being substantially coextensive with the bottom of the U-shaped grooves whereby one side of the U-shaped grooves is at least partially obliterated by the sawing, the sides of the U-shaped grooves that remain serving to prevent development of fractures in the die beyond the remaining side as the wafer is being sawed.
13. The method of claim 12 wherein the etching is a dry etch using a combination of gases comprising SF6 and O2.
14. The method of claim 13 wherein the opening at the surface is 3.5 to 5.5 microns wide.
15. The method of claim 13 wherein the U-groove is approximately 4 microns in depth.
16. The method of claim 13 wherein the U-groove is approximately 3.5 to 5.5 microns in depth.
17. The method of claim 13 wherein the U-groove is approximately 6 to 10 microns in width.