Granted Patent
Utility
US 6,651,235
· Confirmation No. 4753
SCALABLE, PARTITIONING INTEGRATED CIRCUIT LAYOUT SYSTEM
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2003-09-08 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2003-09-08 | LET. |
Miscellaneous Incoming Letter | 1 | View | |
| 2003-07-11 | LET. |
Miscellaneous Incoming Letter | 1 | View | |
| 2003-07-11 | DRW |
Drawings-only black and white line drawings | 1 | View | |
| 2001-10-30 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-10-30 | SPEC |
Specification | 24 | View | |
| 2001-10-30 | CLM |
Claims | 10 | View | |
| 2001-10-30 | ABST |
Abstract | 1 | View | |
| 2001-10-30 | DRW |
Drawings-only black and white line drawings | 8 | View | |
| 2001-10-30 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Wei-Jin Dai
Cupertino, CA
Kit-Lam Cheong
Palo Alto, CA
Hsi-Chuan Chen
Fremont, CA
Wei-Lun Kao
Cupertino, CA
Attorneys & Agents of Record
Classification
USPC
716/7
G06F30/39
G06F2119/12
G06F30/30
Prosecution
- Examiner
- ROSSOSHEK, YELENA
- Art Unit
- 2825
- Customer No.
- 7812
- Docket No.
- SILI 2281
- Confirmation No.
- 4753
Publication
- Pub. No.
- US20030084416A1
- Pub. Date
- 2003-05-01
Patent Term Adjustment
0days
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-07-08
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-10-30
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Quick Facts
- Patent No.
- US 6,651,235
- App. No.
- 10/003,595
- Filed
- 2001-10-30
- Granted
- 2003-11-18
- Pub. No.
- US20030084416A1
- Examiner
- ROSSOSHEK, YELENA
- Art Unit
- 2825
- PTA
- 0 days
External Links