IP Library Granted Patent US 6,931,488
Granted Patent B2
US 6,931,488 · App. 10/021,492 · Granted Aug 16, 2005

Reconfigurable cache for application-based memory configuration

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Quick Facts
Patent No.
US 6,931,488
App. No.
10/021,492
Granted
Aug 16, 2005
Kind
B2
Abstract

A computer system includes a cache memory a functional unit in communication with the cache memory, and a reconfiguration module. The functional unit executes applications using the cache memory. The reconfiguration module is for determining an optimal configuration of cache memory for a particular application and programming the cache memory to the optimal configuration. A method of reconfiguring cache memory includes determining an optimal configuration of cache memory for a particular application executed by a functional unit using a cache memory and programming the cache memory to the optimal configuration.

Claims (43)

1. A computer system comprising:

a cache memory;

a functional unit in communication with the cache memory, wherein the functional unit executes applications using the cache memory; and

a reconfiguration module for determining an optimal configuration of the cache memory for a particular application and programming the cache memory to the optimal configuration.

2. The computer system of claim 1 , wherein the cache memory is a field-programmable gate array.

3. The computer system of claim 1 , wherein the reconfiguration module supplies a vector representing the optimal configuration determined to the cache memory.

4. The computer system of claim 1 , wherein the reconfiguration module determines the optimal configuration by collecting performance information and analyzing the collected performance information.

5. The computer system of claim 1 , wherein the cache memory, the functional unit, and the reconfiguration unit are combined into a single system.

6. The computer system of claim 1 , wherein the cache memory is a programmable memory module.

7. A method of reconfiguring cache memory comprising:

determining an optimal configuration of the cache memory for a particular application executed by a functional unit using the cache memory; and

programming the cache memory to the optimal configuration.

8. The method of claim 7 , wherein the determining of the optimal configuration of the cache memory for a particular application executed by a functional unit using the cache memory comprises:

collecting performance information; and

analyzing the collected performance information.

9. The method of claim 7 , further comprising:

determining another optimal configuration of the cache memory for another particular application executed by the functional unit using the cache memory; and

programming the cache memory to the another optimal configuration.

10. The method of claim 9 , further comprising:

dynamically switching between programming the cache memory to the optimal configuration and the another optimal configuration based on which application is being executed by the functional unit.

11. The method of claim 7 , wherein the programming of the cache memory comprises:

creating a vector representing the optimal configuration; and

sending the vector to the cache memory.

12. The method of claim 11 , wherein a field programmable gate array configuration generator tool creates the vector.

13. A computer system comprising:

means for determining an optimal configuration of cache memory for a particular application executed by a functional unit using a cache memory; and

means for programming the cache memory to the optimal configuration.

14. The computer system of claim 13 , wherein the means for determining the optimal configuration of the cache memory for a particular application executed by a functional unit using a cache memory comprises:

means for collecting and analyzing performance information.

15. The computer system of claim 13 , wherein the means for programming the cache memory comprises:

means for creating a vector representing the optimal configuration and sending the vector to the cache memory.

16. The computer system of claim 13 , further comprising:

means for determining another optimal configuration of cache memory for another particular application executed by the functional unit using the cache memory; and

means for programming the cache memory to the another optimal configuration.

17. The computer system of claim 16 , further comprising:

means for dynamically switching between programming the cache memory to the optimal configuration and the another optimal configuration based on which application is being executed by the functional unit.

18. A computer system comprising:

a field-programmable gate array;

a functional unit in communication with the field-programmable gate array, wherein the functional unit executes applications using the field-programmable gate array; and

a reconfiguration module for determining an optimal configuration of the field-Programmable gate array for a particular application and programming the field-programmable gate array to the optimal configuration,

wherein the reconfiguration module determines the optimal configuration by collecting performance information and analyzing the collected performance information.

19. The computer system of claim 18 , wherein the reconfiguration module supplies a vector representing the optimal configuration determined for the field programmable gate array.

20. The computer system of claim 18 , wherein the field programmable gate array, the functional unit, and the reconfiguration unit are combined into a single system.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 12, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037278/0853 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2001
From: PAULRAJ, DOMINIC
To: SUN MICROSYSTEMS, INC.
Reel/Frame 012393/0934 →