IP Library Granted Patent US 6,880,145
Granted Patent B1
US 6,880,145 · App. 10/029,089 · Granted Apr 12, 2005

Method for determining die placement based on global routing architecture

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Quick Facts
Patent No.
US 6,880,145
App. No.
10/029,089
Granted
Apr 12, 2005
Kind
B1
Abstract

A method for interconnecting a plurality of dies. The method generally includes receiving a plurality of interconnect requirements for the dies. The interconnect requirements may include a priority for each of a plurality of nets. A position and an angle for one of the dies relative to a substrate may be calculated in response to the interconnect requirements. A plurality of nets may then be routed among the dies and a plurality of substrate pads defining external connections for the substrate. The dies may be mounted to the substrate after routing has been finalized.

Claims (34)

1. A method for interconnecting a plurality of dies, comprising the steps of:

(A) receiving a plurality of interconnect requirements for said plurality of dies, said plurality of interconnect requirements comprising (i) a priority order for each of a plurality of nets and (ii) at least one delay from a group of delays consisting of a shortest possible delay, a maximum delay, a range of delays, and a ratsnest delay;

(B) calculating a position and an angle for one of said plurality of dies relative to a substrate mounting of said plurality of dies in response to said plurality of interconnect requirements; and

(C) routing said plurality of nets among said plurality of dies and a plurality of substrate pads on said substrate, said plurality of substrate pads defining external connections.

2. The method according to claim 1 , wherein step (C) further comprises the sub-step of routing said plurality of nets one at a time in descending order of said priority order.

3. The method according to claim 2 , further comprising the step of rotating one of said plurality of dies in response to a target net of said plurality of nets having a shortest possible length requirement of said plurality of interconnect requirements.

4. The method according to claim 2 , further comprising the step of moving one of said plurality of dies in response to a target net of said plurality of nets having a shortest possible length requirement of said plurality of interconnect requirements.

5. The method according to claim 1 , further comprising the step of rotating one of said plurality of dies in response to a target net of said plurality of nets failing to meet at least one of said plurality of interconnect requirements.

6. The method according to claim 1 , further comprising the step of moving one of said plurality of dies in response to said a target net of said plurality of nets failing to meet at least one of said plurality of interconnect requirements.

7. The method according to claim 1 , wherein a trace group comprises routing together at least two nets of said plurality of nets.

8. A method for interconnecting a plurality of dies, comprising the steps of:

(A) receiving a plurality of interconnect requirements for said plurality of dies, said plurality of interconnect requirements comprising a priority order for each of a plurality of nets;

(B) calculating a position and an angle for one of said plurality of dies relative to a substrate mounting of said plurality of dies in response to said plurality of interconnect requirements; and

(C) routing said plurality of nets among said plurality of dies and a plurality of substrate pads on said substrate, said plurality of substrate pads defining external connections, wherein (i) a trace group comprises routine together at least two nets of said plurality of nets and (ii) said plurality of interconnect requirements further comprise a maximum delay variation among said at least two nets of said trace group.

9. A storage medium for use in a computer for interconnecting a plurality of dies, the storage medium recording a computer program that is readable and executable by the computer, the computer program comprising the steps of:

(A) receiving a plurality of interconnect requirements for said plurality of dies;

(B) calculating a position and an angle for one of said plurality of dies relative to a substrate mounting said plurality of dies in response to said plurality of interconnect requirements; and

(C) routing a plurality of nets among said plurality of dies and a plurality of substrate pads on said substrate, said plurality of substrate pads defining external connections, wherein i) a trace group comprises routing together at least two nets of said plurality of nets and (ii) said plurality of interconnect requirements comprise a maximum delay variation among said at least two nets of said trace group.

10. The storage medium according to claim 9 , wherein said plurality of interconnect requirements further comprise a priority order for each of said plurality of nets.

11. The storage medium according to claim 10 , wherein step (C) further comprises the sub-step of routing said plurality of nets one at a time in descending order of said priority order.

12. The storage medium according to claim 11 , further comprising the step of rotating one of said plurality of dies in response to a target net of said plurality of nets having a shortest possible length requirement of said plurality of interconnect requirements.

13. The storage medium according to claim 11 , further comprising the step of moving one of said plurality of dies in response to a target net of said plurality of nets having a shortest possible length requirement of said plurality of interconnect requirements.

14. The storage medium according to claim 9 , further comprising the step of rotating one of said plurality of dies in response to a target net of said plurality of nets failing to meet at least one of said plurality of interconnect requirements.

15. The storage medium according to claim 9 , further comprising the step of moving one of said plurality of dies in response to said a target net of said plurality of nets failing to meet at least one of said plurality of interconnect requirements.

16. An apparatus comprising:

means for receiving a plurality of interconnect requirements for a plurality of dies, said plurality of interconnect requirements comprising (i) a priority order for each of a plurality of nets and (ii) at least one delay from a group of delays consisting of a shortest possible delay, a maximum delay, a range of delays, and a ratsnest delay;

means for calculating a position and an angle for one of said plurality of dies relative to a substrate mounting of said plurality of dies in response to said plurality of interconnect requirements; and

means for routing said plurality of nets among said plurality of dies and a plurality of substrate pads on said substrate, said plurality of substrate pads defining external connections.

17. A method for interconnecting a plurality of dies, comprising the steps of:

(A) receiving a plurality of interconnect requirements for said plurality of dies, said Plurality of interconnect requirements comprising at least one delay from a group of delays consisting of a shortest possible delay, a maximum delay, a range of delay, and a ratsnest delay;

(B) calculating a position and an angle for one of said plurality of dies relative to a substrate mounting of said plurality of dies in response to said plurality of interconnect requirements;

(C) routing a plurality of nets among said plurality of dies and a plurality of substrate pads on said substrate, said plurality of substrate pads defining external connections; and

(D) rotating one of said plurality of dies in response to a target net of said plurality of nets failing to meet at least one of said plurality of interconnect requirements.

18. The method according to claim 17 , wherein said plurality of interconnect requirements further comprise a priority order for each of said plurality of nets.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2014
From: CYPRESS SEMICONDUCTOR CORPORATION
To: DECA TECHNOLOGIES, INC.
Reel/Frame 032534/0431 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2001
From: WRIGHT, ANDREW J.; LIE, JAMES H.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 012402/0754 →