IP Library Granted Patent US 7,012,456
Granted Patent B1
US 7,012,456 · App. 10/029,530 · Granted Mar 14, 2006

Circuit and method for discharging high voltage signals

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Quick Facts
Patent No.
US 7,012,456
App. No.
10/029,530
Granted
Mar 14, 2006
Kind
B1
Abstract

A circuit for discharging a high voltage signal to a supply voltage line. In one embodiment, the circuit includes a first switch receiving the high voltage signal; a second switch having an input coupled with the output of the first switch; and a third switch having an input coupled with the output of the second switch and having an output coupled with the supply voltage line. In this embodiment, the high voltage signal discharges to the supply voltage line when the first, second, and third switches are on. The circuit may include a fourth switch for clamping the high voltage signal to ground. The fourth switch may have a control coupled with the output of the first switch along a discharge path such that when the high voltage signal is discharging and approaches a voltage level of approximately ground, the fourth switch automatically turns on and clamps the high voltage signal to ground level. In this manner, after the high voltage signal has discharged, the fourth switch clamps the high voltage signal to a ground potential so that circuit elements coupled with the high voltage signal may operate.

Claims (59)

1. A circuit for discharging a high voltage signal to a supply voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output;

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply voltage line; and

a fourth switch for clamping said high voltage signal to a ground, the fourth switch having an input coupled with the high voltage signal and an output coupled with said ground;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply voltage line; and

wherein the fourth switch has a control coupled with the output of the first switch such that when the high voltage signal is discharging and approaches a voltage level of approximately said ground, the fourth switch turns on and clamps the high voltage signal to said ground.

2. The circuit of claim 1 , further comprising:

control logic for selectively activating the third switch.

3. The circuit of claim 1 , wherein the high voltage signal is a signal in the range of 0 to −5 volts.

4. The circuit of claim 1 , wherein the high voltage signal is a signal in the range of approximately 0 to −3.3 volts.

5. The circuit of claim 1 , wherein the first switch is a n-channel transistor.

6. The circuit of claim 1 , wherein the second switch is a p-channel transistor.

7. The circuit of claim 1 , wherein the third switch is a p-channel transistor.

8. The circuit of claim 1 , wherein the high voltage signal is a signal in the range of 5 to 10 volts.

9. The circuit of claim 1 , wherein the first switch is a p-channel transistor.

10. The circuit of claim 1 , wherein the second switch is a n-channel transistor.

11. A circuit for discharging a high voltage signal to a supply voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output;

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply voltage line;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply voltage line;

a fourth switch for clamping said high voltage signal to a ground, the fourth switch having an input coupled with the high voltage signal and an output; and

a fifth switch having an input coupled with the output of the fourth switch and an output coupled with said ground, wherein when the fifth switch is off, the high voltage signal is not coupled with ground.

12. A circuit for discharging a high voltage signal to a supply voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output;

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply voltage line;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply voltage line;

a fourth switch having an input coupled with the output of the second switch, the fourth switch having an output coupled with the supply voltage line; and

control logic for selectively activating either the third switch or the fourth switch to discharge the high voltage signal.

13. A circuit for discharging a high voltage signal to a supply voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output;

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply voltage line;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply voltage line; and

a fourth switch for clamping said high voltage signal to a ground, the fourth switch having an input coupled with the high voltage signal and an output coupled with said ground;

wherein the fourth switch is a n-channel transistor.

14. A circuit for discharging a high voltage signal to a supply ground voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output; and

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply ground voltage line;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply ground voltage line;

wherein the third switch is a n-channel transistor; and

wherein the first switch is a p-channel transistor having its gate coupled with a positive supply voltage signal.

15. A circuit for discharging a high voltage signal to a supply voltage line, the circuit comprising:

a first switch receiving the high voltage signal, the first switch having an output;

a second switch having an input coupled with the output of the first switch, the second switch having an output;

a third switch having an input coupled with the output of the second switch, the third switch having an output coupled with the supply voltage line;

wherein when the first, second, and third switches are on, the high voltage signal discharges to the supply voltage line;

a fourth switch for clamping said high voltage signal to a ground, the fourth switch having an input coupled with the high voltage signal and an output coupled with said ground; and

wherein the fourth switch is a p-channel transistor.

16. A method for discharging a high voltage signal, the method comprising:

providing a discharge path from the high voltage signal to a supply line;

discharging the high voltage signal to the supply line through the discharge path; and

providing a clamping device which senses said discharging, said clamping device activating when the high voltage signal approaches a voltage level of approximately said supply line.

17. The method of claim 16 , wherein the clamping device deactivates when the clamping device detects that the high voltage signal is increasing in magnitude.

18. The method of claim 16 , wherein the supply line is a ground connection.

19. The method of claim 16 , wherein the supply line is a positive supply reference.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →