CDMA wireless communication system including finite impulse response filter and phase equalizer for inter-chip interference reduction
View Patent ↗A digital CDMA wireless communication system. The system includes one or more of said transmitters with a base station baseband processor, a finite impulse response (FIR) filter, a pre-distortion phase equalizer and a digital-to-analog (DAC) converter. Receivers have an analog-to-digital (ADC) converter, a FIR filter, a phase equalizer and a receiver baseband processor. The receiver FIR filter is matched to the transmitter FIR filter and the receiver phase equalizer is matched to the pre-distortion phase equalizer.
1. A digital CDMA wireless communication system conforming to CDMA2000 standard comprising:
a plurality of transmitters, one or more of said transmitters comprising a base station baseband processor, a finite impulse response (FIR) filter, a pre-distortion phase equalizer and a digital-to-analog (DAC) converter;
a plurality of receivers, one or more of said receivers comprising an analog to digital (ADC) converter, a FIR filter, a phase equalizer and a receiver baseband processor; and
said receiver FIR filter being matched to said transmitter FIR filter and said receiver phase equalizer is matched to said pre-distortion phase equalizer.
2. A wireless CDMA communication system as in claim 1 wherein said transmitter FIR filter and said receiver FIR filter are constrained such that |H tx (z) H rx (z)| has linear phase and odd symmetry about half the inter-chip frequency (f c /2).
3. A digital CDMA wireless communication system as in claim 1 wherein the transmitter predistortion phase equalizer and said receiver phase equalizer are constrained to H rxeq (z)=H txeq (z −1 ) in the z domain.
4. A digital CDMA wireless communication system as in claim 3 wherein each of the predistortion phase equalizer and the receiver phase equalizer has a transfer function of
H
eq
(
z
)
=
b
0
+
b
1
z
-
1
+
b
2
z
-
2
a
0
+
a
1
z
-
1
+
a
2
z
-
2
where a 0 =b 2 , a 1 =b 1 , and a 2 =b 0 .
5. A wireless CDMA communication system as in claim 4 wherein said transmitter FIR filter and said receiver FIR filter are constrained such that |H tx (z) H rx (z)| has linear phase and odd symmetry about half the inter-chip frequency (f c /2).
6. A digital CDMA wireless communication system as in claim 5 wherein the circuit response (H(z)) for the path from said base station baseband processor in said one or more transmitter to said receiver baseband processor has a linear phase and flat amplitude in-band such that (H(z)=H tx (z)H txeq (z)H rx (z)H rxeq (z)).
7. A digital CDMA wireless communication system as in claim 1 wherein the circuit response (H(z)) for the path from said base station baseband processor in said one or more transmitter to said receiver baseband processor has a linear phase and flat amplitude in-band such that (H(z)=Htx(z)Htxeq(z)Hrx(z)Hrxeq(z)).
8. A wireless remote receiver conforming to CDMA2000 standard comprising:
an analog to digital (ADC) converter;
a receiver finite impulse response (FIR) filter;
a phase equalizer, and
a receiver base band processor,
wherein the FIR filter is matched to a transmitter FIR filter and the receiver phase equalizer is matched to a pre-distortion phase equalizer in a base station for reducing an Inter-Chip Interference caused by distortion introduced by the transmitter FIR filter and pre-distortion phase equalizer in the base station.
9. The receiver as in claim 8 wherein said transmitter FIR filter and said receiver FIR filter are constrained such that |H tx (z) H rx (z)| has linear phase and odd symmetry about half the inter-chip frequency (f c /2).
10. The receiver as in claim 8 wherein the pre-distortion phase equalizer and said receiver phase equalizer are constrained to H rxeq (z)=H txeq (z −1 ) in the z domain.
11. The receiver as in claim 8 wherein said transmitter FIR filter and said receiver FIR filter are constrained such that |H tx (z) H rx (z)| has linear phase and odd symmetry about half the inter-chip frequency (f c /2).