Motion compensation with subblock scanning
View Patent ↗According to an example embodiment, the present invention is directed to pixel-data processing that includes scanning a first 2×2 line in each of a series of immediately adjacent pixel blocks, prior to scanning a second 2×2 line in each of the series of pixel blocks. Each scanned line is then processed for motion compensation in a manner that addresses challenges, including those discussed above, related to buffer size requirements, power consumption requirements and latency.
1. A method for motion compensation in a video signal processing circuit, the method comprising:
scanning a first 2×2 subblock line of a first 8×8 pixel block having at least two 2×2 subblock lines;
after scanning the first 2×2 subblock line of the first 8×8 pixel block, scanning a first 2×2 subblock line of a second immediately adjacent 8×8 pixel block, prior to scanning a second 2×2 subblock line of the first 8×8 pixel block; and
using the scanned subblock lines for motion compensation in a video signal processing circuit.
2. The method of claim 1 , further comprising scanning a first 2×2 subblock line of a plurality of 8×8 pixel blocks, prior to scanning the second 2×2 subblock line of the first 8×8 pixel block.
3. The method of claim 2 , further comprising storing the scanned first 2×2 subblock lines of all of the 8×8 pixel blocks into an input line buffer, wherein using the scanned subblock lines for motion compensation in a video signal processing circuit includes using the scanned lines stored in the line buffer.
4. The method of claim 3 , wherein the 8×8 pixel blocks each include four 2×2 subblock lines, further comprising:
scanning a second 2×2 subblock line of all of the 8×8 pixel blocks, after scanning the first 2×2 subblock line;
successively scanning third and fourth 2×2 subblock lines of all of the 8×8 pixel blocks;
upconverting the scanned 2×2 subblock lines and storing the upconverted lines in first and second line buffers in an order beginning with 2×2 subblocks from the first one of the 8×8 pixel blocks; and
wherein using the scanned subblock lines for motion compensation includes using the scanned subblock lines stored in the input line buffers.
5. The method of claim 4 , further comprising copying the stored 2×2 subblocks from the first and second input line buffers into third and fourth input line buffers used for double buffering, respectively, wherein using the scanned subblock lines for motion compensation includes using the scanned subblock lines stored for double buffering.
6. The method of claim 4 , wherein storing the 2×2 subblock lines in the first and second input line buffers includes storing the 2×2 subblock lines in first and second input line buffers that are about 75% smaller than input line buffers that would be required to store the lines in the 8×8 pixel blocks, were all of the 2×2 subblock lines of each 8×8 pixel block scanned, prior to scanning another 8×8 pixel block.
7. The method of claim 4 , wherein scanning the 2×2 subblock lines includes scanning a single pixel during a clock cycle, wherein the scanning of all of the 2×2 subblock lines is effected about 40 times faster than scanning all of the 2×2 subblock lines would be effected, were all of the 2×2 subblock lines of each 8×8 pixel block scanned, prior to scanning 2×2 subblock lines of another 8×8 pixel block.
8. The method of claim 4 , wherein scanning and storing the 2×2 subblock lines includes using less power than would be required, were all of the 2×2 subblock lines of each 8×8 pixel block scanned, prior to scanning another 8×8 pixel block.
9. The method of claim 4 , wherein upconverting the scanned 2×2 subblock lines and storing the upconverted lines in first and second line buffers includes upconverting and storing the upconverted 2×2 subblock lines in first and second line buffers as they are scanned.
10. A method for motion compensation in a video signal processing circuit having sixteen immediately adjacent 8×8 pixel blocks, each 8×8 pixel block having four 2×2 subblock lines of four pixels, the method comprising:
scanning 64 pixels of a first 2×2 subblock line of each of the sixteen immediately adjacent 8×8 pixel blocks, upconverting the scanned pixels and storing the upconverted pixels of the first scanned subblock line in a first FIFO input line buffer of a vertical processing unit (VPR), the input line buffer having two lines, each line being 128 pixels wide;
after scanning the first 2×2 subblock line, successively scanning and storing the 64 pixels in each of the remaining ones of the four subblock lines of each of the 8×8 pixel blocks in the first FIFO input line buffer;
using the buffered data to interpolate a picture; and
using the interpolated picture for motion compensation.
11. The method of claim 10 , wherein using the buffered data to interpolate a picture includes vertically scaling a display output of the scanned pixel data to a field.
12. The method of claim 10 , wherein using the buffered data to interpolate a picture includes bypassing the VPR and outputting progressive frames.
13. A video signal processing circuit including motion compensation, the circuit comprising:
means for scanning a first 2×2 subblock line of a first 8×8 pixel block having at least two 2×2 subblock lines;
means, responsive to scanning the first 2×2 subblock line of the first 8×8 pixel block, for scanning a first 2×2 subblock line of a second immediately adjacent 8×8 pixel block, prior to scanning a second 2×2 subblock line of the first 8×8 pixel block; and
means for using the scanned subblock lines for motion compensation in a video signal processing circuit.