Imager cell with pinned transfer gate
View Patent ↗An imager cell includes a photoreceptor, a sense node, and a pinned transfer gate. The pinned transfer gate is tied to the same potential of a substrate of the imager cell and is disposed between the photoreceptor and the sense node in order to transfer charge between the photoreceptor and the sense node. The imager further includes a reset transistor disposed to reset the sense node, and an output amplifier coupled to the sense node. Control circuitry supplies a photoreceptor readout clock to the photoreceptor. The readout clock includes an integration period and a transfer period. According to various embodiments of the invention, the imager cell provides improved noise performance, selective charge capacities, and improved blue light response beyond that of conventional imager cells.
1. An imager cell including a substrate having a potential, the imager cell comprising:
a photoreceptor;
a sense node; and
a pinned transfer gate disposed between the photoreceptor and the sense node, the pinned transfer gate being tied to the potential of the substrate and further being configured to transfer charge between the photoreceptor and the sense node;
wherein a voltage determined by the charge transferred between the photoreceptor and the sense node is read out of the imager cell at the sense node.
2. An imager cell as defined in claim 1 , wherein the pinned transfer gate comprises a p-doped pinned region in an n-doped transfer region.
3. An imager cell as defined in claim 1 , further comprising a photoreceptor readout gate disposed above the photoreceptor.
4. An imager cell as defined in claim 1 , wherein the photoreceptor comprises a photogate.
5. An imager cell as defined in claim 1 , wherein the photoreceptor comprises a photodiode.
6. An imager cell as defined in claim 1 , further comprising a reset transistor disposed to reset the sense node.
7. An imager cell as defined in claim 1 , further comprising an output amplifier coupled to the sense node.
8. An imager cell as defined in claim 7 , wherein the output amplifier is a source follower amplifier.
9. An imager cell as defined in claim 3 , further comprising a readout clock connection coupled to the photoreceptor readout gate.
10. An imager cell as defined in claim 9 , further comprising control circuitry coupled to the readout clock connection, the control circuitry supplying a photoreceptor readout clock.
11. An imager cell as defined in claim 10 , wherein the photoreceptor readout clock is characterized by a V+ level applied during an integration period, and a V− level applied during a transfer period.
12. An imager cell including a substrate having a potential, the imager cell comprising:
a photoreceptor;
a sense node;
a pinned transfer gate disposed between the photoreceptor and the sense node, the pinned transfer gate being tied to the potential of the substrate and further being configured to transfer charge between the photoreceptor and the sense node; and
a photoreceptor readout gate disposed above the photoreceptor, the photoreceptor readout gate having material removed to form a photoreceptor readout gate light aperture above the photoreceptor, whereby the photoreceptor provides enhanced response to blue light;
wherein a voltage determined by the charge transferred between the photoreceptor and the sense node is read out of the imager cell at the sense node.
13. An imager cell as defined in claim 12 , further comprising a pinned aperture region under the photoreceptor readout gate light aperture.
14. An imager cell as defined in claim 12 , wherein the pinned transfer gate comprises a p-doped pinned region in an n-doped transfer region.
15. An imager cell as defined in claim 12 , wherein the photoreceptor comprises a photo gate.
16. An imager cell as defined in claim 12 , wherein the photoreceptor comprises a photodiode.
17. An imager cell as defined in claim 12 , further comprising a reset transistor disposed to reset the sense node.
18. An imager cell as defined in claim 12 , further comprising an output amplifier coupled to the sense node.
19. An imager cell as defined in claim 18 , further comprising an anti-reflective coating disposed above the photoreceptor.
20. An imager cell as defined in claim 12 , further comprising a readout clock connection coupled to the photoreceptor readout gate.
21. An imager cell as defined in claim 20 , further comprising control circuitry coupled to the readout clock connection, the control circuitry supplying a photoreceptor readout clock.
22. An imager cell as defined in claim 21 , wherein the photoreceptor readout clock is characterized by a V+ level applied during an integration period, and a V− level applied during a transfer period.
23. An imager cell including a substrate having a potential, the imager cell comprising:
a photoreceptor;
a sense node;
a pinned transfer gate disposed between the photoreceptor and the sense node, the pinned transfer gate being tied to the potential of the substrate and further being configured to transfer charge between the photoreceptor and the sense node; and
a photoreceptor readout gate disposed above the photoreceptor, the photoreceptor readout gate characterized by a photoreceptor readout gate thickness of less than 2000 Angstroms, whereby the photoreceptor provides enhanced response to blue light;
wherein a voltage determined by the charge transferred between the photoreceptor and the sense node is read out of the imager cell at the sense node.
24. An imager cell as defined in claim 23 , wherein the photoreceptor readout gate thickness is less than 1000 Angstroms.
25. An imager cell as defined in claim 23 , wherein the photoreceptor readout gate thickness is less than 500 Angstroms.
26. An imager cell as defined in claim 23 , wherein the pinned transfer gate comprises a p-doped pinned region in an n-doped transfer region.
27. An imager cell as defined in claim 23 , wherein the photoreceptor comprises a photogate.
28. An imager cell as defined in claim 23 , wherein the photoreceptor comprises a photodiode.
29. An imager cell as defined in claim 23 , further comprising a reset transistor disposed to reset the sense node.
30. An imager cell as defined in claim 23 , further comprising an output amplifier coupled to the sense node.
31. An imager cell as defined in claim 28 , wherein the output amplifier is a source follower amplifier.
32. An imager cell as defined in claim 23 , further comprising a readout clock connection coupled to the photoreceptor readout gate.
33. An imager cell as defined in claim 32 , further comprising control circuitry coupled to the readout clock connection, the control circuitry supplying a photoreceptor readout clock.
34. An imager cell as defined in claim 33 , wherein the photoreceptor readout clock is characterized by a V+ level applied during an integration period, and a V− level applied during a transfer period.
35. An imager cell including a substrate having a potential, the imager cell comprising:
means for detecting incident photons;
means for storing transferred charge for readout; and
a pinned transfer gate disposed between the means for detecting and the means for storing, the pinned transfer gate being tied to the potential of the substrate and further being configured to transfer charge between the means for detecting and the means for storing;
wherein a voltage determined by the charge transferred between the means for detecting and the means for storing is read out of the imager cell at the sense node.
36. An imager cell as defined in claim 35 , wherein the pinned transfer gate comprises a p-doped pinned region in an n-doped transfer region.
37. An imager cell as defined in claim 35 , further comprising means for transferring charge from the means for detecting incident photons to the pinned transfer gate.
38. An imager cell as defined in claim 35 , further comprising means for resetting the means for storing transferred charge.
39. An imager cell as defined in claim 35 , further comprising means for amplifying the transferred charge.
40. An imager cell as defined in claim 37 , further comprising means for clocking the means for transferring charge.
41. An imager cell as defined in claim 40 , wherein the means for clocking is characterized by a V+ level applied during an integration period and a V− level applied during a readout transfer period.
42. An imager cell as defined in claim 37 , wherein the means for transferring charge comprises a photoreceptor readout gate characterized by a thickness of less than 2000 Angstroms.
43. An imager cell as defined in claim 38 , wherein the means for transferring charge comprises a photoreceptor readout gate characterized by a thickness of less than 1000 Angstroms.
44. An imager cell as defined in claim 38 , wherein the means for transferring charge comprises a photoreceptor readout gate characterized by a thickness of less than 500 Angstroms.
45. An imager cell as defined in claim 37 , wherein the means for transferring charge comprises a photoreceptor readout gate having material removed to form a photoreceptor readout gate light aperture above the means for detecting incident photons.
46. An imager cell as defined in claim 45 , further comprising a pinned aperture region under the photoreceptor readout gate light aperture.
47. An imaging array including a substrate having a potential, the imaging array comprising:
an array of imager cells, each imager cell comprising a photoreceptor, a sense node, and a photoreceptor readout gate; and wherein at least one of the imager cells further comprises a pinned transfer gate disposed between the photoreceptor and the sense node, the pinned transfer gate being tide to the potential of the substrate and further being configured to transfer charge between the photoreceptor and the sense node; and
control circuitry coupled to each photoreceptor readout gate for supplying a photoreceptor readout clock simultaneously to a set of photoreceptors in the array,
whereby accumulated charge in each photoreceptor is transferred to its sense node to provide a snapshot of an image acquired by the imaging array;
wherein a voltage that is determined by the accumulated charge in each photoreceptor that is transferred to its sense node is read out of each imager cell.
48. An imager cell including a substrate having a potential, the imager cell comprising:
a photoreceptor including a photoreceptor readout gate;
a sense node;
a pinned transfer gate disposed between the photoreceptor and the sense node, the pinned transfer gate being tied to the potential of the substrate and further being configured to transfer charge between the photoreceptor and the sense node; and
control circuitry coupled to the photoreceptor readout gate for applying a photoreceptor readout clock to the photoreceptor readout gate, the photoreceptor readout clock comprising an integration period characterized by an integration voltage selected from a plurality of predetermined integration voltages to setup a preselected charge capacity level in the photoreceptor;
wherein a voltage determined by the charge transferred between the photoreceptor and the sense node is read out of the imager cell at the sense node.