Granted Patent
Utility
US 6,643,196
· Confirmation No. 4713
REDUNDANT MEMORY CIRCUIT FOR ANALOG SEMICONDUCTOR MEMORY
Inventor:
Kenichiro Sugio
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2003-09-06 | IFEE |
Issue Fee Payment (PTO-85B) | 2 | View | |
| 2003-08-28 | LET. |
Miscellaneous Incoming Letter | 1 | View | |
| 2003-08-28 | DRW |
Drawings-only black and white line drawings | 7 | View | |
| 2002-01-30 | TRNA |
Transmittal of New Application | 4 | View | |
| 2002-01-30 | SPEC |
Specification | 90 | View | |
| 2002-01-30 | CLM |
Claims | 5 | View | |
| 2002-01-30 | ABST |
Abstract | 1 | View | |
| 2002-01-30 | DRW |
Drawings-only black and white line drawings | 52 | View | |
| 2002-01-30 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Kenichiro Sugio
Miyazaki, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/200
G11C29/816
G11C7/16
G11C16/08
G11C16/30
Prosecution
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- Docket No.
- OKI.300
- Confirmation No.
- 4713
Foreign Priority
2001-066277
·
2001-03-09
·
JAPAN
Publication
- Pub. No.
- US20020126550A1
- Pub. Date
- 2002-09-12
Patent Term Adjustment
0days
No related applications found.
from
SUGIO, KENICHIRO
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2002-01-30
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Quick Facts
- Patent No.
- US 6,643,196
- App. No.
- 10/058,786
- Filed
- 2002-01-30
- Granted
- 2003-11-04
- Pub. No.
- US20020126550A1
- Examiner
- PHAN, TRONG Q
- Art Unit
- 2818
- PTA
- 0 days
External Links