IP Library Granted Patent US 7,035,617
Granted Patent B2
US 7,035,617 · App. 10/066,024 · Granted Apr 25, 2006

High power block upconverter

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Quick Facts
Patent No.
US 7,035,617
App. No.
10/066,024
Granted
Apr 25, 2006
Kind
B2
Abstract

A system and method for high power block upconversion having a stand-alone and surface-mountable component is provided. The HP-BUC system of the invention provides a “drop-in” component capable of mixing a local oscillator signal with an IF signal to produce an RF signal in the millimeter-wave and higher bands. In addition, the HP-BUC provides filtering of unwanted spurious signals and requires no further signal amplification prior to transmission, for example in a satellite communications system.

Claims (44)

1. A block-up converter comprising:

a subharmonic mixer;

wherein said subharmonic mixer is configured to receive a first input signal, wherein said first input signal is an intermediate frequency signal;

wherein said subharmonic mixer is further configured to receive a second input signal, wherein said second input signal is a local oscillator signal in the Ku band or lower,

wherein said subharmonic mixer is configured to output a RF signal having a frequency greater than 26 GHz;

a filter configured to receive said RF signal and filter unwanted spurious signals which may be present in said RF signal; and

a power amplification device configured to receive said RF signal and to provide a desired signal gain;

wherein said subharmonic mixer, said filter, and said amplification device are located on a single multi-chip module, such that all signal interfaces with said multi-chip module occur at frequencies less than 26 GHz except for the final output of said RF signal from said multi-chip module; wherein said multi-chip module is configured to be surface mounted using a lead frame interface;

wherein said block-up converter is configured to be a high power block-up converter, wherein high power is defined to be any power greater than 1 Wart; and

wherein said block-up converter is configured to provide a high frequency output, wherein high frequency is defined to be any frequency greater than 26 GHz.

2. The block-up converter of claim 1 , further comprising a wave-guide interface configured to output said RF signal from said multi-chip module.

3. The block-up converter of claim 1 , further comprising an insert coupled to said high power amplification device, wherein said insert comprises a material characteristic of at least one of: high thermal conductivity and low thermal expansion properties.

4. The block-up converter of claim 1 , further comprising a chassis and a cover, wherein said chassis and said cover are secured together to substantially encase said block-up converter.

5. The block-up converter of claim 1 , wherein said multi-chip module is configured to be a drop-in component within the next higher assembly level.

6. A block-up converter comprising:

a subharmonic mixer;

wherein said subharmonic mixer is configured to receive a first input signal, wherein said first input signal is an intermediate frequency signal;

wherein said subharmonic mixer is further configured to receive a second input signal, wherein said second input signal is a local oscillator signal in the Ku band or lower;

wherein said subharmonic mixer is configured to output a RF signal having a frequency greater than 26 GHz;

a filter configured to receive said RF signal and filter unwanted spurious signals which may be present in said RF signal; and

a power amplification device configured to receive said RF signal and to provide a desired signal gain;

wherein said subharmonic mixer, said filter, and said amplification device are located on a single multi-chip module,

wherein said block-up converter is configured to be a high power block-up converter, wherein high power is defined to be any power greater than 1 Watt; and

wherein said block-up converter is configured to provide a high frequency output, wherein high frequency is defined to be any frequency greater than 26 GHz.

7. The black-up converter of claim 6 , wherein said multi-chip module is configured to be surface mounted using a lead frame interface.

8. The block-up converter of claim 6 , further comprising a wave-guide interface configured to output said RF signal from said multi-chip module.

9. The block-up converter of claim 6 , further comprising an insert coupled to said high power amplification device, wherein said insert comprises a material characteristic of at least one of: high thermal conductivity and low thermal expansion properties.

10. The block-up converter of claim 6 , further comprising a chassis and a cover, wherein said chassis and said cover are secured together to substantially encase said block-up converter.

11. The block-up converter of claim 6 , wherein said maid-chip module is configured to be a drop-in component within the next higher assembly level.

12. A method for assembling a block-up converter on a single multi-chip module, the method comprising the steps of:

electrically connecting a subharmonic mixer on a multi-chip module to a filter on said multi-chip module;

wherein said subharmonic mixer is configured to receive a first input signal, wherein said first input signal is an intermediate frequency signal;

wherein said subharmonic mixer is further configured to receive a second input signal, wherein said second input signal is a local oscillator signal in the Ku band or lower;

wherein said subharmonic mixer is configured to output a RF signal having a frequency greater than 26 GHz;

wherein said filter is configured to receive said RF signal and filter unwanted spurious signals which may be present in said RF signal; and

electrically connecting said filter to a power amplification device that is also located on said multi-chip module,

wherein said power amplification device is configured to receive said RE signal and to provide a desired signal gain;

wherein said block-up converter is configured to be a high power block-up converter, wherein high power is defined to be any power greater than 1 Watt; and

wherein said block-up converter is configured to provide a high frequency output,

wherein high frequency is defined to be any frequency greater than 26 GHz.

13. The method of claim 12 , further comprising the step of electrically connecting said power amplification device to a wave-guide interface on said multi-chip module that is configured to output said RF signal from said multi-chip module.

14. The method of claim 12 , further comprising the step of surface mounting said multi-chip module using a lead frame interface to the next higher assembly level.

15. The method of claim 12 , further comprising the step of securing a chassis and a cover together to substantially encase said block-up convener.

16. The method of claim 14 , further comprising the step of electrically connecting a driver amplifier, also located on said multi-chip module, between at least one of said subharmonic mixer, said filter, and said power amplification device.

Assignments (5)
SECURITY AGREEMENT Recorded Jun 1, 2023
From: VIASAT, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 063822/0446 →
SECURITY AGREEMENT Recorded Mar 7, 2022
From: VIASAT, INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 059332/0558 →
SECURITY INTEREST Recorded Mar 27, 2019
From: VIASAT, INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 048715/0589 →
SECURITY AGREEMENT Recorded May 9, 2012
From: VIASAT, INC.
To: UNION BANK, N.A.
Reel/Frame 028184/0152 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2009
From: US MONOLITHICS, LLC
To: VIASAT, INC.
Reel/Frame 023594/0310 →