Video signal error detection systems
View Patent ↗Mobile phones now transmit video signals at relatively slow bit rates. The signals transmitted are compressed using inter-frame prediction where sufficient similarity exists between successive picture frames. The receiver includes a decoder which reconstitutes the compressed signals received using signals stored on a buffer representing a previous picture frame. A mode decision circuit compares the signal at the output of the decoder with the previous signal stored and using the same decision criterion as used for the original compression generates a signal which indicates that either the signal is suitable for inter-frame prediction or not. This signal is then compared with the signal from the encoder indicating whether or not the current signal was inter-frame predicted or not. If equality is not detected, then an error may have taken place. Then, error concealment techniques are used.
1. A receiver, comprising a decoder for receiving encoded video signals,
wherein the decoder is operative to decode said encoded video signals transmitted through air, and transmitted selectively in inter-frame prediction format wherein the signals represent differences between selected macroblocks in successive frames when a specific difference criterion between said successive macroblocks is not exceeded, the decoder also being operative to decode a transmitted through air mode indicator signal indicative of whether or not the last received macroblock was encoded in said inter-frame prediction format, frames comprising macroblocks;
the receiver further comprising:
a video signal error detection system comprising a first comparator for comparing macroblocks in successive frames output from said decoder and applying said specific difference criteria to provide an indication of whether inter-frame prediction should apply or not,
and a second comparator for comparing the indication from the first comparator with said mode indicator signal,
the second comparator being operative to generate an error signal when a divergence is detected.
2. A system according to claim 1 , including an error concealment circuit responsive to the decoder and a previous frames buffer to recover corrupted data when the second comparator indicates an error.
3. A system according to claim 1 , wherein the first comparator acts as a mode decision circuit capable of generating one of three outcomes namely, inter-frame prediction, no inter-frame prediction and unknown.
4. A system according to claim 3 , wherein the mode decision circuit responds to each macroblock of each frame from the output from the decoder to determine a mean value for pixels and responds to a difference A between reconstructed values of pixels in said macroblock and said mean value, a difference B between the reconstructed values of pixels of a current macroblock and reconstructed values of pixels of a corresponding macroblock of an immediately preceding frame and an error margin E to provide a first outcome if A<B−E a second outcome if B−E<A<B+E and a third outcome if B+E<A.
5. A system according to claim 2 , wherein the error concealment circuit acts to replace each corrupted macroblock with a corresponding macroblock in the immediately preceding frame.
6. A video signal error detection system for use in a receiver having a decoder for receiving encoded video signals produced by an encoder in a transmitter, wherein the encoder is selectively operative to transmit the differences only between selected macroblocks in successive frames when a specific difference criterion between said successive macroblocks is not exceeded,
and wherein each frame comprises one or more macroblocks, the detection system comprising:
a first comparator configured to compare macroblocks in successive frames in an output signal from said decoder, and to apply said specific difference criterion to provide an indication of whether or not inter-frame prediction should apply, and further configured to determine a mean value for pixels in response to each of said macroblocks; and
a second comparator configured to compare the indication from the first comparator with an output from the decoder indicative of whether or not the last received macroblock was in inter-frame prediction format and operable to generate an error signal when a divergence is detected;
wherein the first comparator comprises a mode decision circuit configured to respond to each macroblock of each frame from the output of the decoder by generating one of three possible outcomes namely, inter-frame prediction, no inter-frame prediction and unknown; and
wherein, in the response to a current macroblock, said possible outcomes are conditioned on a difference A between reconstructed values of pixels in said current macroblock and the corresponding mean pixel value, a difference B between the reconstructed values of pixels of said current macroblock and reconstructed values of pixels of the corresponding macroblock of an immediately preceding frame, and an error margin E, thereby to provide a first of said possible outcomes if A<B−E, a second of said possible outcomes if B−E<A<B+E, and a third of said possible outcomes if B+E<A.