IP Library Granted Patent US 6,977,961
Granted Patent B1
US 6,977,961 · App. 10/069,687 · Granted Dec 20, 2005

Method and apparatus for macroblock DC and AC coefficient prediction for video coding

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Quick Facts
Patent No.
US 6,977,961
App. No.
10/069,687
Granted
Dec 20, 2005
Kind
B1
Abstract

Existing video data compression algorithms exploit the fact that the DCT coefficients in the neighbouring blocks are sometimes similar to those in the current block. This means that if the blocks contain completely different coefficients, for coding video data is disclosed in which element in a prediction matrix is set to an initial prediction value. In the prediction matrix, a smoothing transform is applied to the values along the rows and then along the columns, or vice versa, to obtain interpolated values. The prediction value is reset to the interpolated value and the difference between the reset prediction values and corresponding received pixel values is calculated to produce a residual prediction matrix containing the prediction residuals. A discrete cosine transform is performed on the prediction residuals to obtain elements of a compressed video data matrix. The processor means is preferably arranged iteratively to calculate the reset prediction value used to calculate the prediction residual by repeating steps b) and c).

Claims (44)

1. Apparatus for coding video data, comprising means for receiving pixel values organised in frames each comprising a matrix of video blocks, each video block comprising a video matrix of N pixel values, and processor circuitry arranged:

a) to set each element in a prediction matrix to an initial prediction value;

b) in the prediction matrix, to apply a smoothing transform to the values along rows and then along columns, or vice versa, to obtain interpolated values;

c) to set the prediction values to the interpolated values;

d) to calculate the differences between the prediction values and corresponding received pixel values to produce a residual prediction matrix containing prediction residuals; and

e) to perform a discrete cosine transform on the prediction residuals to obtain elements of a compressed video data matrix, wherein the processor circuitry is arranged iteratively to calculate the prediction values used to calculate the prediction residuals by repeating b) and c); and

wherein a) is performed by performing a discrete cosine transform on the video matrix to obtain a transform video matrix of N coefficients, selecting n of the coefficients, setting the N-n remaining coefficients to zero to obtain an initial prediction transform matrix of initial prediction coefficients, and performing an inverse discrete cosine transform on the initial prediction transform matrix to obtain a matrix of N initial prediction values.

2. Apparatus as claimed in claim 1 , wherein the number of iterations is predetermined.

3. Apparatus as claimed in claim 1 , wherein the processor circuitry is arranged to repeat the iterations until the change in a prediction value between one iteration and the next, is less than a predetermined threshold.

4. Apparatus as claimed in claim 1 , wherein the processor is arranged to set n of the elements in the compressed video data matrix equal to the n coefficients selected from the transform video matrix, and to select the remaining N-n coefficients from the prediction residuals.

5. Apparatus as claimed in claim 4 , wherein the processor is arranged to adjust the prediction residuals before selecting the remaining N-n elements, by:

f) performing a discrete cosine transform on the reset prediction value matrix to obtain a prediction transform matrix,

g) selecting n coefficients from the transform prediction matrix,

h) subtracting the selected n transform prediction matrix coefficients from the selected n transform video coefficients to obtain n residual coefficients;

i) setting n elements of an adjustment transform matrix to the values of the n residual coefficients and setting N-n remaining elements to zero;

j) performing an inverse discrete cosine transform on the adjustment transform matrix to obtain an adjustment value matrix; and

k) subtracting the adjustment value matrix from the reset prediction value matrix.

6. Apparatus as claimed in claim 1 , including means for processing pixels in a current and a previous frame to produce pixel values which are the prediction residual between the actual pixel and a motion compensated pixel.

7. Apparatus for expanding compressed video data, comprising processor circuitry arranged:

a) to perform an inverse discrete cosine transform on received compressed video data to obtain a prediction residual matrix;

b) to set each element in a prediction block matrix to the initial prediction value;

c) in the prediction matrix, to apply a smoothing transform to the values along rows and then along columns, or vice versa, to obtain interpolated values;

d) to set the prediction values to the interpolated values; and

e) to calculate the sum of the prediction values and the prediction residuals in corresponding positions in the received coded block matrix to produce an expanded video data matrix, wherein the processor circuitry is arranged iteratively to calculate the prediction values used to calculate the prediction residuals by repeating c) and d); and

wherein a) is performed by performing a discrete cosine transform on the video matrix to obtain a transform video matrix of N coefficients, selecting n of the coefficients, setting the N-n remaining coefficients to zero to obtain an initial prediction transform matrix of initial prediction coefficients, and performing an inverse discrete cosine transform on the initial prediction transform matrix to obtain a matrix of N initial prediction values.

8. Apparatus as claimed in claim 7 , wherein the number of iterations is predetermined.

9. Apparatus as claimed in claim 4 , wherein the processor circuitry is arranged to repeat the iterations until the change in the prediction value between one iteration and the next, is less than a predetermined threshold.

10. Apparatus as claimed in claim 7 for expanding compressed video data, wherein the processor is arranged to select N-n elements from the compressed video data matrix and to set n elements to zero before performing the inverse discrete cosine transform to obtain the prediction residual matrix.

11. Apparatus for coding video data adapted to receive pixel values organised in frames each comprising a matrix of video blocks, each video block comprising a video matrix of N pixel values, and processor circuitry arranged:

a) to set each element in a prediction matrix to an initial prediction value;

b) in the prediction matrix, to apply a smoothing transform to the values along the rows and then along the columns, or vice versa, to obtain interpolated values;

c) to reset the prediction value to the interpolated value;

d) to calculate the difference between the reset prediction values and corresponding received pixel values to produce a residual prediction matrix containing the prediction residuals; and

e) to perform a discrete cosine transform on the prediction residuals to obtain elements of a compressed video data matrix, wherein a) is performed by performing a discrete cosine transform on the video matrix to obtain a transform video matrix of N coefficients, selecting n of the coefficients, setting the N-n remaining coefficients to zero to obtain an initial prediction transform matrix of initial prediction coefficients, and performing an inverse discrete cosine transform on the initial prediction transform matrix to obtain a matrix of N initial prediction values.

12. Apparatus as claimed in claim 11 , wherein the processor circuitry is arranged iteratively to calculate the reset prediction value used to calculate the prediction residual by repeating b) and c).

13. Apparatus as claimed in claim 11 , including means for processing pixels in a current and a previous frame to produce pixel values which are the prediction residual between the actual pixel and a motion compensated pixel.

14. Apparatus for expanding compressed video data, comprising processor circuitry arranged:

a) to perform an inverse discrete cosine transform on received compressed video data to obtain a prediction residual matrix;

b) to set each element in a prediction block matrix to the initial prediction value;

c) in the prediction matrix, to apply a smoothing transform to the values along the rows and then along the columns, or vice versa, to obtain interpolated values;

d) to reset the prediction value to the interpolated value; and

e) to calculate the sum of the reset prediction values and the prediction residual in corresponding positions in the received coded block matrix to produce an expanded video data matrix, wherein a) is performed by performing a discrete cosine transform on the video matrix to obtain a transform video matrix of N coefficients, selecting n of the coefficients, setting the N-n remaining coefficients to zero to obtain an initial prediction transform matrix of initial prediction coefficients, and performing an inverse discrete cosine transform on the initial prediction transform matrix to obtain a matrix of N initial prediction values.

15. Apparatus as claimed in claim 14 , wherein the processor circuitry is arranged iteratively to calculate the reset prediction value used to calculate the prediction residual by repeating c) and d).

16. Apparatus as claimed in claim 14 for expanding compressed video data, wherein the processor is arranged to select N-n elements from the compressed video data matrix and to set n elements to zero before performing the inverse discrete cosine transform to obtain the prediction residual matrix.

Assignments (8)
SECURITY INTEREST Recorded Jun 1, 2021
From: WSOU INVESTMENTS, LLC
To: OT WSOU TERRIER HOLDINGS, LLC
Reel/Frame 056990/0081 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: OCO OPPORTUNITIES MASTER FUND, L.P. (F/K/A OMEGA CREDIT OPPORTUNITIES MASTER FUND LP
To: WSOU INVESTMENTS, LLC
Reel/Frame 049246/0405 →
SECURITY INTEREST Recorded May 20, 2019
From: WSOU INVESTMENTS, LLC
To: BP FUNDING TRUST, SERIES SPL-VI
Reel/Frame 049235/0068 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2017
From: ALCATEL LUCENT
To: WSOU INVESTMENTS, LLC
Reel/Frame 044000/0053 →
SECURITY INTEREST Recorded Sep 21, 2017
From: WSOU INVESTMENTS, LLC
To: OMEGA CREDIT OPPORTUNITIES MASTER FUND, LP
Reel/Frame 043966/0574 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2014
From: CREDIT SUISSE AG
To: ALCATEL-LUCENT USA INC.
Reel/Frame 033950/0001 →
SECURITY INTEREST Recorded Mar 7, 2013
From: ALCATEL-LUCENT USA INC.
To: CREDIT SUISSE AG
Reel/Frame 030510/0627 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2002
From: ERYURTLU, FARUK MEHMET OMER
To: LUCENT TECHNOLOGIES INC.
Reel/Frame 012839/0656 →