IP Library Granted Patent US 7,093,185
Granted Patent B2
US 7,093,185 · App. 10/074,422 · Granted Aug 15, 2006

Apparatus and method for generating codes in communication system

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 7,093,185
App. No.
10/074,422
Granted
Aug 15, 2006
Kind
B2
Abstract

A QCTC (Quasi-Complementary Turbo Code) generating apparatus having: a turbo encoder for generating an information symbol sequence and a plurality of parity symbol sequences by encoding the information symbol sequence; a channel interleaver for individually interleaving the symbol sequences, generating new parity symbol sequences by multiplexing the symbols of parity symbol sequences with the same priority levels, and serially concatenating the information symbol sequence and the new parity symbol sequences; and a QCTC generator for generating a sub-code with a given code rate by recursively selecting a predetermined number of symbols from the concatenated symbol sequence at a given starting position.

Claims (32)

1. A QCTC (Quasi-Complementary Turbo Code) generating apparatus comprising:

a turbo encoder having a plurality of constituent encoders, for receiving information bits, generating a plurality of parity symbol sequences by encoding the information bits, and outputting an information symbol sequence and the plurality of parity symbol sequences, each constituent encoder for generating at least one parity symbol sequence corresponding to at least one parity symbol sequence from another constituent encoder;

an interleaver for individually interleaving the information symbol sequence and the parity symbol sequences;

a multiplexer for generating a new parity symbol sequence by multiplexing the interleaved symbols of the corresponding parity symbol sequences;

a symbol concatenator for serially concatenating the interleaved information symbol sequence and the new parity symbol sequence; and

a QCTC generator for generating a sub-code of a QCTC with a given code rate by selecting a predetermined number of symbols from the serially concatenated symbol sequence,

wherein the predetermined number of symbols is started from a starting symbol at a given starting position and the number of the selected symbols is determined according to the code rate.

2. The QCTC generating apparatus of claim 1 , wherein the interleaver individually interleaves the information symbol sequence and the plurality of parity symbol sequences by PBRO (Partial Bit Reversal Order) interleaving.

3. The QCTC generating apparatus of claim 1 , wherein the given starting position is the position of a symbol following the last symbol selected for the previous transmission.

4. The QCTC generating apparatus of claim 1 , wherein the QCTC generator comprises:

a symbol repeater for repeating the serially concatenated symbol sequence; and

a symbol selector for generating the sub-code by selecting the predetermined number of symbols from the repeated symbol sequence according to the given code rate.

5. The QCTC generating apparatus of claim 1 , wherein the QCTC generator comprises:

a circular buffer memory for storing the serially concatenated symbol sequence; and

a symbol selector for generating the sub-code by selecting the predetermined number of symbols from the stored symbol sequence at the given starting position according to the given code rate.

6. A QCTC (Quasi-Complementary Turbo Code) generating method comprising the steps of:

receiving information bits;

generating a plurality of parity symbol sequences by encoding the information bits, the plurality of parity symbol sequences being generated from constituent encoders, at least one parity symbol sequence being generated from each of the constituent encoders, and the at least one parity symbol sequence from one constituent encoder corresponding to the at least one parity symbol sequence from another constituent encoder;

outputting an information symbol sequence and the plurality of parity symbol sequences;

individually interleaving the information symbol sequence and the parity symbol sequences;

generating a new parity symbol sequence by multiplexing the interleaved symbols of the corresponding parity symbol sequences;

serially concatenating the interleaved information symbol sequence and the new parity symbol sequence; and

generating a sub-code of a QCTC with a given code rate by selecting a predetermined number of symbols from the serially concatenated symbol sequence,

wherein the predetermined number of symbols is started from a starting symbol at a given starting position and the number of the selected symbols is determined according to the code rate.

7. The QCTC generating method of claim 6 , wherein the interleaving step is performed by PBRO (Partial Bit Reversal Order) interleaving.

8. The QCTC generating method of claim 6 , wherein the given starting position is the position of a symbol following the last symbol selected for the previous transmission.

9. The QCTC generating method of claim 6 , wherein the QCTC generation step comprises the steps of:

repeating the serially concatenated symbol sequence; and

generating the sub-code by selecting the predetermined number of symbols from the repeated symbol sequence according to the given code rate.

10. The QCTC generating method of claim 6 , wherein the QCTC generation step comprises the steps of:

storing the serially concatenated symbol sequence in a circular buffer memory; and

generating the sub-code by selecting the predetermined number of symbols from the circular buffer memory at the given starting position according to the given code rate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2010
From: SAMSUNG ELECTRONICS CO., LTD
To: QUALCOMM INCORPORATED
Reel/Frame 023905/0498 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2002
From: KIM, MIN-GOO; JANG, JAE-SUNG
To: SAMSUNG ELECTRONICS, CO., LTD.
Reel/Frame 012855/0624 →
Priority Claims (2)
KR 2001-8275 · Feb 13, 2001 · national
KR 2001-7357 · Feb 14, 2001 · national
Continuity (1)
Related Publication 20020129314A1 · Sep 12, 2002